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STMicroelectronics |
STP5NK90Z TYPE STP5NK90Z STF5NK90Z s Figure 1: Package ID 4.5 A 4.5 A (*) Pw 125 W 30 W VDSS 900 V 900 V RDS(on) < 2.5 Ω < 2.5 Ω TYPICAL RDS(on) = 2 Ω s EXTREMELY HIGH dv/dt CAPABILITY s IMPROVED ESD CAPABILITY s 100% AVALANCHE RATED s GATE CHARGE MINIMIZE |
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STMicroelectronics |
OMNIFET: FULLY AUTOPROTECTED POWER MOSFET Type VND5N07 VND5N07-1 VND5N07FI VND5N07FM Vclamp RDS(on) 0.2 Ω Ilim Figure 1. Package 70 V 5A 3 1 DPAK TO-252 IPAK TO-251 3 2 1 ■ ■ ■ ■ ■ ■ LINEAR CURRENT LIMITATION THERMAL SHUT DOWN SHORT CIRCUIT PROTECTION INTEGRATED CLAMP LOW CURRENT DRAW |
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ST Microelectronics |
STSTP5NA80FI I 800 800 ± 30 o Unit V DS V DGR V GS ID ID I DM ( •) P tot V ISO T stg Tj Drain-source Voltage (V GS = 0) Drain-gate Voltage (R GS = 20 k Ω ) Gate-source Voltage Drain Current (continuous) at T c = 25 C Drain Current (continuous) at T c = 100 o C |
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STMicroelectronics |
N-channel Power MOSFET Type STP5NK80Z STP5NK80ZFP VDSS (@Tjmax) 800 V 800 V RDS(on) < 2.4 Ω < 2.4 Ω ID 4.3 A 4.3 A ■ 100% avalanche tested ■ Gate charge minimized ■ Very low intrinsic capacitances ■ Very good manufacturing repeatibility Description The SuperMESH™ ser |
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STMicroelectronics |
STP5NK80Z www.DataSheet4U.com Type VDSS (@Tjmax) 800 V 800 V RDS(on) < 2.4 Ω < 2.4 Ω ID 4.3 A 4.3 A 3 1 2 STP5NK80Z STP5NK80ZFP ■ ■ ■ ■ 100% avalanche tested Gate charge minimized Very low intrinsic capacitances Very good manufacturing repeatibility TO-2 |
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ST Microelectronics |
STP5NC50 -1 STP5NC50FP Unit VDS VDGR VGS ID ID IDM ( ) PTOT dv/dt(1) VISO Tj Tstg Drain-source Voltage (VGS = 0) Drain-gate Voltage (RGS = 20 kΩ) Gate- source Voltage Drain Current (continuos) at TC = 25°C Drain Current (continuos) at TC = 100°C Drain Curr |
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ST Microelectronics |
STP5NC90 OF GATE-TO-SOURCE ZENER DIODES The built-in back-to-back Zener diodes have specifically been designed to enhance not only the device’s ESD capability, but also to make them safely absorb possible voltage transients that may occasionally be applied fr |
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ST Microelectronics |
N-Channel MOSFET t VDS VDGR VGS ID ID IDM ( ) PTOT dv/dt(1) VISO Tj Tstg Drain-source Voltage (VGS = 0) Drain-gate Voltage (RGS = 20 kΩ) Gate- source Voltage Drain Current (continuos) at TC = 25°C Drain Current (continuos) at TC = 100°C Drain Current (pulsed) Total |
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ST Microelectronics |
N-CHANNEL ENHANCEMENT MODE FAST POWER MOS TRANSISTOR I 800 800 ± 30 o Unit V DS V DGR V GS ID ID I DM ( •) P tot V ISO T stg Tj Drain-source Voltage (V GS = 0) Drain-gate Voltage (R GS = 20 k Ω ) Gate-source Voltage Drain Current (continuous) at T c = 25 C Drain Current (continuous) at T c = 100 o C |
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ST Microelectronics |
N-Channel Enhancement Mode Power MOS Transistor |
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ST Microelectronics |
N-CHANNEL Power MOSFET Order codes VDS RDS(on) max. STB5NK50Z-1 STD5NK50ZT4 STP5NK50Z 500 V 1.5 Ω STP5NK50ZFP STU5NK50Z • 100% avalanche tested • Gate charge minimized • Very low intrinsic capacitance • Zener-protected ID 4.4 A Package I2PAK DPAK TO-220 TO-220 |
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ST Microelectronics |
N-CHANNEL ENHANCEMENT MODE POWER MOS TRANSISTORS |
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ST Microelectronics |
STP5NB80 INGS Symb ol V DS V DGR V GS ID ID I DM ( • ) P tot dv/dt( 1) V ISO T s tg Tj Parameter Drain-source Voltage (VGS = 0) Drain- gate Voltage (RGS = 20 k Ω ) G ate-source Voltage Drain Current (continuous) at Tc = 25 o C Drain Current (continuous) at Tc |
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STMicroelectronics |
STP5NC70Z OF GATE-TO-SOURCE ZENER DIODES The built-in back-to-back Zener diodes have specifically been designed to enhance not only the device’s ESD capability, but also to make them safely absorb possible voltage transients that may occasionally be applied fr |
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STMicroelectronics |
STP5NK50ZFP Order codes VDS RDS(on) max. STB5NK50Z-1 STD5NK50ZT4 STP5NK50Z 500 V 1.5 Ω STP5NK50ZFP STU5NK50Z • 100% avalanche tested • Gate charge minimized • Very low intrinsic capacitance • Zener-protected ID 4.4 A Package I2PAK DPAK TO-220 TO-220 |
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STMicroelectronics |
STP5NB100FP ) V ISO T s tg Tj Parameter Drain-source Voltage (V GS = 0) Drain- gate Voltage (R GS = 20 k Ω ) G ate-source Voltage Drain Current (continuous) at T c = 25 C Drain Current (continuous) at T c = 100 C Drain Current (pulsed) T otal Dissipation at T c |
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STMicroelectronics |
STP5NK100Z Type STF5NK100Z STP5NK100Z STW5NK100Z ■ ■ ■ ■ ■ VDSS (@TJMAX) 1000 V 1000 V 1000 V RDS(on)max < 3.7 Ω < 3.7 Ω < 3.7 Ω ID 3 3.5 A 3.5 A 3.5 A TO-220 1 2 TO-220FP Extremely high dv/dt capability 100% avalanche tested Gate charge minimized Very |
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STMicroelectronics |
STP5NA80 -source Voltage ID Drain Current (continuous) at Tc = 25 oC ID Drain Current (continuous) at Tc = 100 oC IDM( •) Drain Current (pulsed) Ptot Total Dissipation at Tc = 25 oC Derating Factor VISO Insulation Withstand Voltage (DC) Tstg Storage Temperatur |
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STMicroelectronics |
N-channel Power MOSFET Order code VDS RDS(on) max. ID PTOT STP5N105K5 1050 V 3.5 Ω 3 A 85 W Figure 1: Internal schematic diagram D(2, TAB) G(1) S(3) AM01476v1 Worldwide best FOM (figure of merit) Ultra low gate charge 100% avalanche tested Zener-protected |
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STMicroelectronics |
N-Channel Power MOSFET TAB Order code VDS RDS(on) max. ID STP5N95K3 950 V 3.5 Ω 4A t(s) TO-220 1 23 roduc D(2, TAB) • 100% avalanche tested • Extremely high dv/dt capability • Very low intrinsic capacitance • Improved diode reverse recovery characteristics • Z |
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Desde 2024. D4U Semiconductor.
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