No. | parte # | Fabricante | Descripción | Hoja de Datos |
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Renesas |
16-Bit Single-Chip Microcontrollers Ultra-low power consumption technology VDD = single power supply voltage of 1.6 to 5.5 V HALT mode STOP mode SNOOZE mode RL78 CPU core CISC architecture with 3-stage pipeline Minimum instruction execution time: Can be changed from high s |
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Renesas Technology |
Silicon N Channel MOS FET Series Power Switching • • • • Logic level operation (4 to 6 V Gate drive) High endurance capability against to the short circuit Built-in the over temperature shut-down circuit Latch type shut-down operation (Need 0 voltage recovery) Outline RENESAS Package code: PRSS000 |
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Renesas |
P-Channel MOSFET • Logic level operation (-4 to -6 V Gate drive) • High endurance capability against to the short circuit • Built –in the over temperature shut –down circuit • Latch type shut –down operation (Need 0 voltage recovery) Outline LDPAK D G Gate resistor |
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Renesas Technology |
Silicon N Channel MOS FET Series Power Switching • • • • Logic level operation (4 to 6 V Gate drive) High endurance capability against to the short circuit Built-in the over temperature shut-down circuit Latch type shut-down operation (Need 0 voltage recovery) Outline RENESAS Package code: PRSS000 |
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Renesas |
16-Bit Single-Chip Microcontrollers Ultra-low power consumption technology VDD = single power supply voltage of 1.6 to 5.5 V HALT mode STOP mode SNOOZE mode RL78 CPU core CISC architecture with 3-stage pipeline Minimum instruction execution time: Can be changed from high s |
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Renesas |
16-Bit Single-Chip Microcontrollers Ultra-low power consumption technology VDD = single power supply voltage of 1.6 to 5.5 V HALT mode STOP mode SNOOZE mode RL78 CPU core CISC architecture with 3-stage pipeline Minimum instruction execution time: Can be changed from high s |
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|
Renesas |
Silicon N-Channel Power MOS FET • Logic level operation (4 to 6 V Gate drive) • High endurance capability against to the short circuit • Built-in the over temperature shutdown circuit • Latch type shutdown operation (Need 0 voltage recovery) Outline D G Gate Resistor Temperatur |
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Renesas |
P-Channel MOSFET Logic level operation to ( –4 to –6 V Gate drive) Built-in the over temperature shut-down circuit High endurance capability against to the shut-down circuit Latch type shut down operation (need 0 voltage recovery) Built-in the current limitation circu |
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Renesas |
16-Bit Single-Chip Microcontrollers Ultra-low power consumption technology VDD = single power supply voltage of 1.6 to 5.5 V HALT mode STOP mode SNOOZE mode RL78 CPU core CISC architecture with 3-stage pipeline Minimum instruction execution time: Can be changed from high s |
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Renesas |
16-Bit Single-Chip Microcontrollers Ultra-low power consumption technology VDD = single power supply voltage of 1.6 to 5.5 V HALT mode STOP mode SNOOZE mode RL78 CPU core CISC architecture with 3-stage pipeline Minimum instruction execution time: Can be changed from high s |
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|
Renesas |
16-Bit Single-Chip Microcontrollers Ultra-low power consumption technology VDD = single power supply voltage of 1.6 to 5.5 V HALT mode STOP mode SNOOZE mode RL78 CPU core CISC architecture with 3-stage pipeline Minimum instruction execution time: Can be changed from high s |
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|
|
Renesas |
16-Bit Single-Chip Microcontrollers Ultra-low power consumption technology VDD = single power supply voltage of 1.6 to 5.5 V HALT mode STOP mode SNOOZE mode RL78 CPU core CISC architecture with 3-stage pipeline Minimum instruction execution time: Can be changed from high s |
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|
Renesas |
16-Bit Single-Chip Microcontrollers Ultra-low power consumption technology VDD = single power supply voltage of 1.6 to 5.5 V HALT mode STOP mode SNOOZE mode RL78 CPU core CISC architecture with 3-stage pipeline Minimum instruction execution time: Can be changed from high s |
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|
Renesas |
16-Bit Single-Chip Microcontrollers Ultra-low power consumption technology VDD = single power supply voltage of 1.6 to 5.5 V HALT mode STOP mode SNOOZE mode RL78 CPU core CISC architecture with 3-stage pipeline Minimum instruction execution time: Can be changed from high s |
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|
Renesas |
16-Bit Single-Chip Microcontrollers Ultra-low power consumption technology VDD = single power supply voltage of 1.6 to 5.5 V HALT mode STOP mode SNOOZE mode RL78 CPU core CISC architecture with 3-stage pipeline Minimum instruction execution time: Can be changed from high s |
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|
Renesas |
16-Bit Single-Chip Microcontrollers Ultra-low power consumption technology VDD = single power supply voltage of 1.6 to 5.5 V HALT mode STOP mode SNOOZE mode RL78 CPU core CISC architecture with 3-stage pipeline Minimum instruction execution time: Can be changed from high s |
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Renesas |
16-Bit Single-Chip Microcontrollers Ultra-low power consumption technology VDD = single power supply voltage of 1.6 to 5.5 V HALT mode STOP mode SNOOZE mode RL78 CPU core CISC architecture with 3-stage pipeline Minimum instruction execution time: Can be changed from high s |
|
|
|
Renesas |
P-Channel MOSFET • Logic level operation (-4 to -6 V Gate drive) • High endurance capability against to the short circuit • Built –in the over temperature shut –down circuit • Latch type shut –down operation (Need 0 voltage recovery) Outline LDPAK D G Gate resistor |
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|
|
Renesas |
Silicon N-Channel Power MOS FET • Logic level operation (4 to 6 V Gate drive) • High endurance capability against to the short circuit • Built-in the over temperature shutdown circuit • Latch type shutdown operation (Need 0 voltage recovery) Outline D G Gate Resistor Temperatur |
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|
Renesas |
Silicon N-Channel MOSFET • Logic level operation (6 V Gate drive) • High endurance capability against to the short circuit • Built –in the over temperature shut –down circuit • Latch type shut –down operation (Need 0 voltage recovery) Outline LDPAK D G Gate resistor Temper |
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