logo

ESMT F50 DataSheet

No. parte # Fabricante Descripción Hoja de Datos
1
F50L1G41LB

ESMT
3.3V 1 Gbit SPI-NAND Flash Memory

 Voltage Supply: 3.3V (2.7V~3.6V)
 Organization - Memory Cell Array: (128M + 4M) x 8bit - Data Register: (2K + 64) x 8bit
 Automatic Program and Erase - Page Program: (2K + 64) Byte - Block Erase: (128K + 4K) Byte
 Page Read Operation - Page Siz
Datasheet
2
F50D1G41LB-66YG2M

ESMT
1.8V 1 Gbit SPI-NAND Flash Memory
Voltage Supply: 1.8V (1.7V~1.95V) Organization - Memory Cell Array: (128M + 4M) x 8bit - Data Register: (2K + 64) x 8bit Automatic Program and Erase - Page Program: (2K + 64) Byte - Block Erase: (128K + 4K) Byte Page Read Operation - Page Size: (2K
Datasheet
3
F50D4G41XB

ESMT
1.8V 4-Gbit SPI-NAND Flash Memory

 Voltage Supply: 1.8V (1.7 V ~ 1.95V)
 Single-level cell (SLC) technology
 Organization - Page size x1: 4352 bytes (4096 + 256 bytes) - Block size: 64 pages (256K + 16K bytes) - Plane size: 1 x 2048 blocks
 Standard and extended SPI-compatible se
Datasheet
4
F50D1G41LB-66YG2ME

ESMT
1.8V 1 Gbit SPI-NAND Flash Memory
Voltage Supply: 1.8V (1.7V~1.95V) Organization - Memory Cell Array: (128M + 4M) x 8bit - Data Register: (2K + 64) x 8bit Automatic Program and Erase - Page Program: (2K + 64) Byte - Block Erase: (128K + 4K) Byte Page Read Operation - Page Size: (2K
Datasheet
5
F50D1G41LB-50YG2ME

ESMT
1.8V 1 Gbit SPI-NAND Flash Memory
Voltage Supply: 1.8V (1.7V~1.95V) Organization - Memory Cell Array: (128M + 4M) x 8bit - Data Register: (2K + 64) x 8bit Automatic Program and Erase - Page Program: (2K + 64) Byte - Block Erase: (128K + 4K) Byte Page Read Operation - Page Size: (2K
Datasheet
6
F50L2G41XA-104YG2B

ESMT
3.3V 2 Gbit SPI-NAND Flash Memory

 Single-level cell (SLC) technology
 Organization - Page size x1: 2176 bytes (2048 + 128 bytes) - Block size: 64 pages (128K + 8K bytes) - Plane size: 2Gb (2 planes, 1024 blocks per plane)
 Standard and extended SPI-compatible serial bus interface
Datasheet
7
F50D1G41LB-50YG2M

ESMT
1.8V 1 Gbit SPI-NAND Flash Memory
Voltage Supply: 1.8V (1.7V~1.95V) Organization - Memory Cell Array: (128M + 4M) x 8bit - Data Register: (2K + 64) x 8bit Automatic Program and Erase - Page Program: (2K + 64) Byte - Block Erase: (128K + 4K) Byte Page Read Operation - Page Size: (2K
Datasheet
8
F50L2G41LB-104YG2M

ESMT
3.3V 2 Gbit (2 x 1 Gbit) SPI-NAND Flash Memory

 Voltage Supply: 3.3V (2.7V~3.6V)
 Organization - Memory Cell Array: (128M + 4M) x 8bit - Data Register: (2K + 64) x 8bit
 Automatic Program and Erase - Page Program: (2K + 64) Byte - Block Erase: (128K + 4K) Byte
 Page Read Operation - Page Size
Datasheet
9
F50L2G41LB-104YG2ME

ESMT
3.3V 2 Gbit (2 x 1 Gbit) SPI-NAND Flash Memory

 Voltage Supply: 3.3V (2.7V~3.6V)
 Organization - Memory Cell Array: (128M + 4M) x 8bit - Data Register: (2K + 64) x 8bit
 Automatic Program and Erase - Page Program: (2K + 64) Byte - Block Erase: (128K + 4K) Byte
 Page Read Operation - Page Size
Datasheet
10
F50D2G41LB-50YG2M

ESMT
1.8V 2 Gbit (2 x 1 Gbit) SPI-NAND Flash Memory

 Voltage Supply: 1.8V (1.7V~1.95V)
 Organization - Memory Cell Array: (128M + 4M) x 8bit - Data Register: (2K + 64) x 8bit
 Automatic Program and Erase - Page Program: (2K + 64) Byte - Block Erase: (128K + 4K) Byte
 Page Read Operation - Page Si
Datasheet
11
F50L2G41LB-50YG2ME

ESMT
1.8V 2 Gbit (2 x 1 Gbit) SPI-NAND Flash Memory

 Voltage Supply: 1.8V (1.7V~1.95V)
 Organization - Memory Cell Array: (128M + 4M) x 8bit - Data Register: (2K + 64) x 8bit
 Automatic Program and Erase - Page Program: (2K + 64) Byte - Block Erase: (128K + 4K) Byte
 Page Read Operation - Page Si
Datasheet
12
F50D2G41LB-66YG2M

ESMT
1.8V 2 Gbit (2 x 1 Gbit) SPI-NAND Flash Memory

 Voltage Supply: 1.8V (1.7V~1.95V)
 Organization - Memory Cell Array: (128M + 4M) x 8bit - Data Register: (2K + 64) x 8bit
 Automatic Program and Erase - Page Program: (2K + 64) Byte - Block Erase: (128K + 4K) Byte
 Page Read Operation - Page Si
Datasheet
13
F50L2G41LB-66YG2ME

ESMT
1.8V 2 Gbit (2 x 1 Gbit) SPI-NAND Flash Memory

 Voltage Supply: 1.8V (1.7V~1.95V)
 Organization - Memory Cell Array: (128M + 4M) x 8bit - Data Register: (2K + 64) x 8bit
 Automatic Program and Erase - Page Program: (2K + 64) Byte - Block Erase: (128K + 4K) Byte
 Page Read Operation - Page Si
Datasheet



logo    Desde 2024. D4U Semiconductor.   |   Contáctenos   |   Política de Privacidad