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F50L1G41LB |
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| Part Number | F50L1G41LB |
| Manufacturer | ESMT |
| Description | The serial electrical interface follows the industry-standard serial peripheral interface (SPI), providing a cost-effective non-volatile memory storage solution in systems where pin count must be kept... |
| Features |
Voltage Supply: 3.3V (2.7V~3.6V) Organization - Memory Cell Array: (128M + 4M) x 8bit - Data Register: (2K + 64) x 8bit Automatic Program and Erase - Page Program: (2K + 64) Byte - Block Erase: (128K + 4K) Byte Page Read Operation - Page Size: (2K + 64) Byte - Read from Cell to Register with Internal ECC: 100us Memory Cell: 1bit/Memory Cell Support SPI-Mode 0 and SPI-Mode 31 Fast Write Cycle Time - Program time:400us - Block Erase time: 4ms Hardware Data Protection - Program/Erase Lockout During Power Transitions Reliable CMOS Floating Gate Technology - Internal ECC Require... |
| Document |
 F50L1G41LB Data Sheet
PDF 1.47MB |
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Desde 2024. D4U Semiconductor.
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