| No. | parte # | Fabricante | Descripción | Hoja de Datos |
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System Logic Semiconductor |
Quad 2-Input Exclusive OR Gate 70 Max 5.25 Unit V V V mA mA °C DC ELECTRICAL CHARACTERISTICS over full operating conditions Guaranteed Limit Symbol VIK VOH VOL Parameter Input Clamp Voltage High Level Output Voltage Low Level Output Voltage Test Conditions VCC = min, IIN = -18 mA |
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System Logic Semiconductor |
Octal 3-State Noninverting Bus Transceiver ata Transmitted from Bus A to Bus B Buses Isolated (High Impedance State) L H H X X = don’t care SLS System Logic Semiconductor SL74LS245 MAXIMUM RATINGS * Symbol VCC VIN VOUT Tstg * Parameter Supply Voltage Input Voltage Output Voltage Stor |
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System Logic Semiconductor |
Quad 2-Input Exclusive OR Gate 70 Max 5.25 Unit V V V mA mA °C DC ELECTRICAL CHARACTERISTICS over full operating conditions Guaranteed Limit Symbol VIK VOH VOL Parameter Input Clamp Voltage High Level Output Voltage Low Level Output Voltage Test Conditions VCC = min, IIN = -18 mA |
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System Logic Semiconductor |
Synchronous 4-Bit Counters an internal carry look-ahead for application in high-speed counting designs. Synchronous operation is provided by having all flip-flops clocked simultaneously so that the outputs change conicident with each other when so instructed by the count-enabl |
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System Logic Semiconductor |
Hex Inverter ower dissipation per package, plastic DIP+ SOIC package+ Storage temperature Lead temperature, 1.5 mm from Case for 10 seconds (Plastic DIP ), 0.3 mm (SOIC Package) Value -0.5 ÷ +7.0 ±20 ±50 ±25 ±50 ±50 750 500 -65 ÷ +150 260 Unit V mA mA mA mA mA |
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System Logic Semiconductor |
Quad 2-Input Data Selector/Multiplexer 0 Unit V V V °C Maximum Ratings are those values beyond which damage to the device may occur. Functional operation should be restricted to the Recommended Operating Conditions. RECOMMENDED OPERATING CONDITIONS Symbol VCC VIH VIL IOH IOL TA Supply |
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System Logic Semiconductor |
8-Bit Serial-Input/Parallel-Output Shift Register gated serial inputs and an asynchronous reset. The gated serial inputs (A and B) permit complete control over incoming data as a low at either (or both) input(s) inhibits entry of the new data and resets the first flip flop to the low level at the ne |
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System Logic Semiconductor |
Hex Inverters with Open-Drain Outputs t V V V °C Maximum Ratings are those values beyond which damage to the device may occur. Functional operation should be restricted to the Recommended Operating Conditions. RECOMMENDED OPERATING CONDITIONS Symbol VCC VIH VIL VOH IOL TA Supply Voltag |
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System Logic Semiconductor |
3-to-8-Line Decoder/Demultiplexer X X H H H H H H H H L L L L L L L L L L L L L L L L A2 A1 A0 X X X X X X X X X L L L L L H L H L L H H H L L H L H H H L H H H Outputs Y0 Y1 Y2 Y3 Y4 Y5 Y6 Y7 H H H H H H H H H H H H H H H H H H H H H H H H L H H H H H H H H L H H H H H H H H L H H H |
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System Logic Semiconductor |
8-Bit Serial-Input/Parallel-Output Shift Register gated serial inputs and an asynchronous reset. The gated serial inputs (A and B) permit complete control over incoming data as a low at either (or both) input(s) inhibits entry of the new data and resets the first flip flop to the low level at the ne |
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System Logic Semiconductor |
Hex Inverter m Case for 10 seconds (Plastic DIP ), 0.3 mm (SOIC Package) Value -0.5 ~ +7.0 ±20 ±50 ±25 ±50 ±50 750 500 -65 ~ +150 260 Unit V mA mA mA mA mA mW °C °C IOK* 2 Io* 3 IGND ICC PD Tstg TL * Maximum Ratings are those values beyond which damage to th |
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System Logic Semiconductor |
Hex Schmitt-Trigger Inverter package+ Storage temperature Lead temperature, 1.5 mm from Case for 10 seconds (Plastic DIP ), 0.3 mm (SOIC Package) Value -0.5 ~ +7.0 ±20 ±50 ±25 ±50 ±50 750 500 -65 ~ +150 260 Unit V mA mA mA mA mA mW °C °C IGND ICC PD Tstg TL * Maximum Rating |
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System Logic Semiconductor |
OCTAL D-TYPE TRANSPARENT LATCH (3-State) , Iok Io Icc IGND Tstg PD Parameter Supply voltage Input diode current Output diode current Output current bus drivers DC Vcc or GND current for types bus driver outputs GND current Storage temperature range Power dissipation per package: DIP SO Rati |
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System Logic Semiconductor |
Hex Inverter ower dissipation per package, plastic DIP+ SOIC package+ Storage temperature Lead temperature, 1.5 mm from Case for 10 seconds (Plastic DIP ), 0.3 mm (SOIC Package) Value -0.5 ÷ +7.0 ±20 ±50 ±25 ±50 ±50 750 500 -65 ÷ +150 260 Unit V mA mA mA mA mA |
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System Logic Semiconductor |
Hex Inverted Buffers Supply Voltage High Level Input Voltage Low Level Input Voltage High Level Output Voltage Low Level Output Current Ambient Temperature Range 0 Parameter Min 4.75 2.0 0.8 30 40 +70 Max 5.25 Unit V V V V mA °C DC ELECTRICAL CHARACTERISTICS over full |
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System Logic Semiconductor |
OCTAL D-TYPE TRANSPARENT LATCH L no change Z SLS System Logic Semiconductor SL74LV373 ABSOLUTE MAXIMUM RATINGS* Symbol VCC IIK * 1 2 Parameter Supply voltage Input diode current Output diode current Output source or sink current VCC current GND current Power dissipation per pa |
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System Logic Semiconductor |
Quad 2-Input OR Gate stic DIP+ SOIC package+ Storage temperature Lead temperature, 1.5 mm from Case for 10 seconds (Plastic DIP ), 0.3 mm (SOIC Package) Value -0.5 ÷ +5.0 ±20 ±50 ±25 ±50 ±50 750 500 -65 ÷ +150 260 Unit V mA mA mA mA mA mW °C °C IOK * IO * ICC IGND PD |
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System Logic Semiconductor |
Hex Inverted Buffers with Open-Collector Outputs Supply Voltage High Level Input Voltage Low Level Input Voltage High Level Output Voltage Low Level Output Current Ambient Temperature Range 0 Parameter Min 4.75 2.0 0.8 30 40 +70 Max 5.25 Unit V V V V mA °C DC ELECTRICAL CHARACTERISTICS over full |
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System Logic Semiconductor |
Hex Non-Inverted Buffers with Open-Collector Outputs put Voltage Low Level Output Current Ambient Temperature Range 0 Parameter Min 4.75 2.0 0.8 30 40 +70 Max 5.25 Unit V V V V mA °C DC ELECTRICAL CHARACTERISTICS over full operating conditions Guaranteed Limit Symbol VIK IOH VOL Parameter Input Clamp |
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System Logic Semiconductor |
Synchronous 4 Bit Counters; Binary/ Direct Reset an internal carry look-ahead for application in high-speed counting designs. Synchronous operation is provided by having all flip-flops clocked simultaneously so that the outputs change conicident with each other when so instructed by the count-enabl |
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Desde 2024. D4U Semiconductor.
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