74LS86 |
Part Number | 74LS86 |
Manufacturer | System Logic Semiconductor |
Description | SL74LS86 Quad 2-Input Exclusive OR Gate This device contains four independent 2-input Exclusive-OR gates. It performs the Boolean functions Y=A ⊕ B=AB+AB in positive logic. ORDERING INFORMATION SL74LS86N Plastic SL74LS86D SOIC TA = 0° to 70° C for all packages LOGIC DIAGRAM PIN ASSIGNMENT FUNCTION TABLE Inputs A PIN 14 =VCC PIN 7 = GND L L H H B L H L H. |
Features | 70 Max 5.25 Unit V V V mA mA °C DC ELECTRICAL CHARACTERISTICS over full operating conditions Guaranteed Limit Symbol VIK VOH VOL Parameter Input Clamp Voltage High Level Output Voltage Low Level Output Voltage Test Conditions VCC = min, IIN = -18 mA VCC = min, IOH = -0.4 mA VCC = min, IOL = 4 mA VCC = min, IOL = 8 mA IIH High Level Input Current VCC = max, VIN = 2.7 V VCC = max, VIN = 7.0 V IIL IO ICC Low Level Input Current Output Short Circuit Current Supply Current Total with outputs high Total with outputs low VCC = max, VIN = 0.4 V VCC = max, VO = 0 V (Note 1) VCC = max -20 2.7 0.4 0.5 4. |
Datasheet |
74LS86 Data Sheet
PDF 29.72KB |
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74LS86 |
Part Number | 74LS86 |
Manufacturer | Fairchild Semiconductor |
Title | Quad 2-Input Exclusive-OR Gate |
Description | This device contains four independent gates each of which performs the logic exclusive-OR function. Ordering Code: Order Number DM74LS86M DM74LS86SJ DM74LS86N Package Number M14A M14D N14A Package Description 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150 Narrow 14-Lead Small . |
Features | erature Range 7V 7V 0°C to +70°C −65°C to +150°C Note 1: The “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the absolute maximum ratings. The “Recommended Operating Conditions” table will define the . |
74LS86 |
Part Number | 74LS86 |
Manufacturer | Hitachi Semiconductor |
Title | Quadruple 2-input Exclusive-OR Gates |
Description | Unit: mm 19.20 20.32 Max 14 8 6.30 7.40 Max 1 2.39 Max 1.30 7 7.62 0.51 Min 2.54 Min 5.06 Max 2.54 ± 0.25 0.48 ± 0.10 0.25 – 0.05 0° – 15° + 0.10 Hitachi Code JEDEC EIAJ Weight (reference value) DP-14 Conforms Conforms 0.97 g Unit: mm 10.06 10.5 Max 14 8 5.5 1 7 *0.22 ± 0.05 0.20 ± 0.04 2. |
Features | rty rights for information contained in this document. Hitachi bears no responsibility for problems that may arise with third party’s rights, including intellectual property rights, in connection with use of the information contained in this document. 2. Products and product specifications may be subject to change without notice. Confirm that you have received the latest product standards or speci. |
No. | Parte # | Fabricante | Descripción | Hoja de Datos |
---|---|---|---|---|
1 | 74LS83 |
Fairchild Semiconductor |
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2 | 74LS83 |
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4-BIT BINARY FULL ADDER | |
3 | 74LS83A |
Motorola |
4-BIT BINARY FULL ADDER | |
4 | 74LS848 |
Motorola |
8-INPUT PRIORITY ENCODERS | |
5 | 74LS85 |
ON Semiconductor |
LOW POWER SCHOTTKY | |
6 | 74LS85 |
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4-Bit Magnitude Comparator | |
7 | 74LS86A |
Texas Instruments |
QUADRUPLE 2-INPUT EXCLUSIVE-OR GATE | |
8 | 74LS89 |
Fairchild Semiconductor |
64-Bit RAM | |
9 | 74LS89 |
Signetics |
64-Bit RAM | |
10 | 74LS00 |
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