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Intel Corporation |
(28FxxxJ3A) Intel StrataFlash Memory s s s s s High-Density Symmetrically-Blocked Architecture — 128 128-Kbyte Erase Blocks (128 M) — 64 128-Kbyte Erase Blocks (64 M) — 32 128-Kbyte Erase Blocks (32 M) High Performance Interface Asynchronous Page Mode Reads — 110/25 ns Read Access T |
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Intel Corporation |
Intel StrataFlash Memory ■ ■ ■ Performance — 110/115/120/150 ns Initial Access Speed — 125 ns Initial Access Speed (256 Mbit density only) — 25 ns Asynchronous Page mode Reads — 30 ns Asynchronous Page mode Reads (256Mbit density only) — 32-Byte Write Buffer —6.8 µs per b |
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Intel Corporation |
1024K (128K x 8) CMOS FLASH MEMORY g 10% VCC Tolerance Maximum Latch-Up Immunity through EPI Processing ETOX TM III Flash Nonvolatile Memory Technology EPROM-Compatible Process Base High-Volume Manufacturing Experience JEDEC-Standard Pinouts 32-Pin Plastic DIP 32-Lead PLCC (See Packag |
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Intel Corporation |
(TE28FxxxP30) Strata Flash Embedded Memory ■ High performance ■ Security — 85/88 ns initial access — One-Time Programmable Registers: • 64 unique factory device identifier bits — 40 MHz with zero wait states, 20 ns clock-to • 64 user-programmable OTP bits data output synchronous-burst read mod |
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Intel Corporation |
Intel StrataFlash Embedded Memory ■ High performance ■ Security — 85/88 ns initial access — One-Time Programmable Registers: • 64 unique factory device identifier bits — 40 MHz with zero wait states, 20 ns clock-to • 64 user-programmable OTP bits data output synchronous-burst read mod |
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Intel Corporation |
Intel StrataFlash Embedded Memory ■ High performance ■ Security — 85/88 ns initial access — One-Time Programmable Registers: • 64 unique factory device identifier bits — 40 MHz with zero wait states, 20 ns clock-to • 64 user-programmable OTP bits data output synchronous-burst read mod |
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Intel Corporation |
Intel StrataFlash Memory (J3) Datasheet ■ Performance ■ Architecture — 110/115/120/150 ns Initial Access Speed — Multi-Level Cell Technology: High — 125 ns Initial Access Speed (256 Mbit density only) — 25 ns Asynchronous Page mode Reads — 30 ns Asynchronous Page mode Reads |
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Intel Corporation |
(28FxxxL30) Wireless Memory ■ High performance Read-While-Write/Erase — 85 ns initial access — 52MHz with zero wait state, 17 ns clock-to-data output synchronous-burst mode — 25 ns asynchronous-page mode — 4-, 8-, 16-, and continuous-word burst mode — Burst suspend — Programma |
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Intel Corporation |
StrataFlash Embedded Memory ■ High performance ■ Security — 85/88 ns initial access — One-Time Programmable Registers: • 64 unique factory device identifier bits — 40 MHz with zero wait states, 20 ns clock-to • 64 user-programmable OTP bits data output synchronous-burst read mod |
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Intel Corporation |
StrataFlash Embedded Memory |
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Intel Corporation |
StrataFlash Embedded Memory ■ High performance www.DataSheet4U.com ■ Security — 85/88 ns initial access — One-Time Programmable Registers: • 64 unique factory device identifier bits — 40 MHz with zero wait states, 20 ns clock-to • 64 user-programmable OTP bits data output sync |
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Intel Corporation |
Numonyx Embedded Flash Memory ■ ■ Architecture — High-density symmetrical 128-Kbyte blocks —128 Mbit (128 blocks) —64 Mbit (64 blocks) —32 Mbit (32 blocks) Performance — 75 ns Initial Access Speed (128/64/32 -Mbit densities) — 25 ns 8-word and 4-word Asynchronous page-mode read |
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Intel Corporation |
(28FxxxL18) StrataFlash Wireless Memory High performance Read-While-Write/Erase — 85 ns initial access — 54 MHz with zero wait state, 14 ns clock-todata output synchronous-burst mode — 25 ns asynchronous-page mode — 4-, 8-, 16-, and continuous-word burst mode — Burst suspend — Programmable |
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Intel Corporation |
1024K (128K x 8) CMOS FLASH MEMORY g 10% VCC Tolerance Maximum Latch-Up Immunity through EPI Processing Y Y Y Y ETOX-III Flash-Memory Technology EPROM-Compatible Process Base High-Volume Manufacturing Experience Compatible with JEDEC-Standard Byte-Wide EPROM Pinouts 10 000 Program |
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Intel Corporation |
(GE28FxxxKx) Intel StrataFlash Memory (J3) Performance — 110/115/120 ns Initial Access Speed for 64/128/256 Mbit Densities — 25 ns Asynchronous Page-Mode Reads, 8 Words Wide — 13 ns Synchronous Burst-Mode Reads, 8 or 16 Words Wide — 32-Word Write Buffer — Buffered Enhanced Factory Programmin |
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Intel Corporation |
(GE28FxxxKx) Intel StrataFlash Memory (J3) Performance — 110/115/120 ns Initial Access Speed for 64/128/256 Mbit Densities — 25 ns Asynchronous Page-Mode Reads, 8 Words Wide — 13 ns Synchronous Burst-Mode Reads, 8 or 16 Words Wide — 32-Word Write Buffer — Buffered Enhanced Factory Programmin |
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Intel Corporation |
StrataFlash Memory Datasheet ■ Performance ■ Architecture — 110/115/120/150 ns Initial Access Speed — Multi-Level Cell Technology: High — 125 ns Initial Access Speed (256 Mbit density only) — 25 ns Asynchronous Page mode Reads — 30 ns Asynchronous Page mode Reads |
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Intel Corporation |
StrataFlash Memory Datasheet ■ Performance ■ Architecture — 110/115/120/150 ns Initial Access Speed — Multi-Level Cell Technology: High — 125 ns Initial Access Speed (256 Mbit density only) — 25 ns Asynchronous Page mode Reads — 30 ns Asynchronous Page mode Reads |
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Intel Corporation |
(PH28FxxxL18) StrataFlash Wireless Memory High performance Read-While-Write/Erase — 85 ns initial access — 54 MHz with zero wait state, 14 ns clock-todata output synchronous-burst mode — 25 ns asynchronous-page mode — 4-, 8-, 16-, and continuous-word burst mode — Burst suspend — Programmable |
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Desde 2024. D4U Semiconductor.
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