| No. | parte # | Fabricante | Descripción | Hoja de Datos |
|---|---|---|---|---|
|
|
|
ETC |
APOLLO MVP4 GH Added FP description, AC/DC tables, pin placement diagram; Fixed misc typos GH 7/298 Reconciled with target spec: changed pinouts & poweron config, added registers EC 7/27/98 Changed pinout; added pin descriptions; changed p/n to VT82C501; reforma |
|
|
|
|
ETC |
Ascend Semiconductor Corporation(64Mb SDRAM) • Fully synchronous to positive clock edge • Single 3.3V +/- 0.3V power supply • LVTTL compatible with multiplexed address • Industrial temperature available • Programmable Burst Length ( BL ) - 1,2,4,8 or full page • Programmable CAS Latency ( CL ) |
|
|
|
|
ETC |
PCI INTEGRATED PERIPHERAL CONTROLLER 7HFKQRORJLHV ,QF :H &RQQHFW VT82C596A • Universal Serial Bus Controller − − − − − USB v.1.0 and Intel Universal HCI v.1.1 compatible Eighteen level (doublewords) data FIFO with full scatter and gather capability Root hub and two function ports |
|
|
|
|
ETCTI |
SN65MLVD128/129 - 1:8 LVTTL to M-LVDS Repeater Dual 1:4 LVTTL to M-LVDS Repeate |
|
|
|
|
ETC |
Ascend Semiconductor Corporation(64Mb SDRAM) • Fully synchronous to positive clock edge • Single 3.3V +/- 0.3V power supply • LVTTL compatible with multiplexed address • Industrial temperature available • Programmable Burst Length ( BL ) - 1,2,4,8 or full page • Programmable CAS Latency ( CL ) |
|
|
|
|
ETC |
Ascend Semiconductor Corporation(64Mb SDRAM) • Fully synchronous to positive clock edge • Single 3.3V +/- 0.3V power supply • LVTTL compatible with multiplexed address • Industrial temperature available • Programmable Burst Length ( BL ) - 1,2,4,8 or full page • Programmable CAS Latency ( CL ) |
|
|
|
|
ETC |
Real Time Clock • Drop-in replacement for IBM AT computer clock/calendar. • Pin configuration closely matches the DS12887, DS12885and DS12885Q • Counts seconds, minutes, hours, days, day of the week, date, month, and year with leap year compensation • Binary or BCD |
|
|
|
|
ETC |
4 MEG x 16 EDO DRAM • Single +3.3V ±0.3V power supply • Industry-standard x16 pinout, timing, functions, and package • 12 row, 10 column addresses (4) 13 row, 9 column addresses (8) • High-performance CMOS silicon-gate process • All inputs, outputs and clocks are LVTTL- |
|
|
|
|
ETCTI |
3.3-V ABT OCTAL TRANSPARENT D-TYPE LATCHES (Rev. H) |
|
|
|
|
ETCTI |
3.3-V ABT OCTAL REGISTERED TRANSCEIVERS (Rev. F) |
|
|
|
|
ETC |
Ascend Semiconductor Corporation(64Mb SDRAM) • Fully synchronous to positive clock edge • Single 3.3V +/- 0.3V power supply • LVTTL compatible with multiplexed address • Industrial temperature available • Programmable Burst Length ( BL ) - 1,2,4,8 or full page • Programmable CAS Latency ( CL ) |
|
|
|
|
ETC |
Ascend Semiconductor Corporation(64Mb SDRAM) • Fully synchronous to positive clock edge • Single 3.3V +/- 0.3V power supply • LVTTL compatible with multiplexed address • Industrial temperature available • Programmable Burst Length ( BL ) - 1,2,4,8 or full page • Programmable CAS Latency ( CL ) |
|
|
|
|
ETC |
Ascend Semiconductor Corporation(64Mb SDRAM) • Fully synchronous to positive clock edge • Single 3.3V +/- 0.3V power supply • LVTTL compatible with multiplexed address • Industrial temperature available • Programmable Burst Length ( BL ) - 1,2,4,8 or full page • Programmable CAS Latency ( CL ) |
|
|
|
|
ETC |
Ascend Semiconductor Corporation(64Mb SDRAM) • Fully synchronous to positive clock edge • Single 3.3V +/- 0.3V power supply • LVTTL compatible with multiplexed address • Industrial temperature available • Programmable Burst Length ( BL ) - 1,2,4,8 or full page • Programmable CAS Latency ( CL ) |
|
|
|
|
ETC |
Ascend Semiconductor Corporation(64Mb SDRAM) • Fully synchronous to positive clock edge • Single 3.3V +/- 0.3V power supply • LVTTL compatible with multiplexed address • Industrial temperature available • Programmable Burst Length ( BL ) - 1,2,4,8 or full page • Programmable CAS Latency ( CL ) |
|
|
|
|
ETC |
Ascend Semiconductor Corporation(64Mb SDRAM) • Fully synchronous to positive clock edge • Single 3.3V +/- 0.3V power supply • LVTTL compatible with multiplexed address • Industrial temperature available • Programmable Burst Length ( BL ) - 1,2,4,8 or full page • Programmable CAS Latency ( CL ) |
|
|
|
|
ETC |
Clock Generator ∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗ Generates essential clock signals for the motherboard 4V to 7V operating supply range Supports 80286, 80386 and 80486 based designs Wide range of selectable output frequencies < 2ns skew between CPU and 2X CPU clock outputs S |
|
|
|
|
ETC |
SOUTH BRIDGE PC99 COMPLIANT bullets, document title, and block diagram Replaced pinout diagram with blank BGA352 template Added LAN, LPC, and EEPROM pin descriptions, removed signals as req’d Updated Functions 5 and 6 per engineering input Added Preliminary Ballout & Mechanical |
|
|
|
|
ETC |
AMAZON PCI ETHERNET CONTROLLER * * * * PRELIMINARY VT86C926 * * * * * * * * * * * * Single chip Ethernet controller for PCI bus interface Software compatible to NE2000+, NE2000 Support 35ns access time SRAM Integrated 10BaseT TP interface -- Built-in pre-equalization circuit |
|
|
|
|
ETCTI |
SN65MLVD128/129 - 1:8 LVTTL to M-LVDS Repeater Dual 1:4 LVTTL to M-LVDS Repeate |
|
Desde 2024. D4U Semiconductor.
|