74AUP1G125 Datasheet. existencias, precio

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74AUP1G125 Low-power buffer/line driver


74AUP1G125
Part Number 74AUP1G125
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Diodes
74AUP1G125
Part Number 74AUP1G125
Manufacturer Diodes
Title SINGLE BUFFER GATE
Description The Advanced, Ultra Low Power (AUP) CMOS logic family is designed for low power and extended battery life in portable applications. Pin Assignments The 74AUP1G125 is a single, non-inverting buffer/bus driver, designed for operation over a power supply range of 0.8V to 3.6V. The device has a three-.
Features
• Advanced Ultra Low Power (AUP) CMOS
• Supply Voltage Range from 0.8V to 3.6V
• ±4mA Output Drive at 3.0V
• Low Static Power Consumption ICC < 0.9µA
• Low Dynamic Power Consumption CPD = 6.3pF (Typical at 3.6V)
• Schmitt Trigger Action at all inputs makes the circuit tolerant for slower input rise and fall time. The hysteresis is typically 250mV at VCC = 3.0V.
• IOFF Supports Partial-Power-Down M.
nexperia
74AUP1G125
Part Number 74AUP1G125
Manufacturer nexperia
Title Low-power buffer/line driver
Description The 74AUP1G125 is a single buffer/line driver with 3-state output. Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times. This device ensures very low static and dynamic power consumption across the entire VCC range from 0.8 V to 3.6 V. This device is fu.
Features and benefits
• Wide supply voltage range from 0.8 V to 3.6 V
• High noise immunity
• Complies with JEDEC standards:
• JESD8-12 (0.8 V to 1.3 V)
• JESD8-11 (0.9 V to 1.65 V)
• JESD8-7 (1.2 V to 1.95 V)
• JESD8-5 (1.8 V to 2.7 V)
• JESD8-B (2.7 V to 3.6 V)
• ESD protection:
• HBM JESD22-A114F Class 3A exceeds 5000 V
• MM JESD22-A115-A exceeds 200 V
• CDM JESD22-C101E exceeds 1000 V
• Low static powe.

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