No. | parte # | Fabricante | Descripción | Hoja de Datos |
---|---|---|---|---|
|
|
Texas Instruments |
OCTAL BUFFERS AND LINE DRIVERS and bus-oriented receivers and transmitters. The ’HC240 devices are organized as two 4-bit buffers/drivers with separate output-enable (OE) inputs. When OE is low, the device passes inverted data from the A inputs to the Y outputs. When OE is high, |
|
|
|
Texas Instruments |
12-BIT ASYNCHRONOUS BINARY COUNTERS sition at the clock (CLK) input. Applications include time-delay circuits, counter controls, and frequency-dividing circuits. ORDERING INFORMATION TA PACKAGE† PACKAGE† ORDERABLE PART NUMBER TOP-SIDE MARKING PDIP − N Tube of 25 SN74HC4040N S |
|
|
|
Texas Instruments |
OCTAL BUFFERS AND LINE DRIVERS and bus-oriented receivers and transmitters. The ’HC240 devices are organized as two 4-bit buffers/drivers with separate output-enable (OE) inputs. When OE is low, the device passes inverted data from the A inputs to the Y outputs. When OE is high, |
|
|
|
Texas Instruments |
OCTAL TRANSPARENT D-TYPE LATCHE evels of the D inputs. A buffered output-enable (OE) input can be used to place the eight outputs in either a normal logic state (high or low) or the high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines |
|
|
|
Texas Instruments |
OCTAL TRANSPARENT D-TYPE LATCHE evels of the D inputs. A buffered output-enable (OE) input can be used to place the eight outputs in either a normal logic state (high or low) or the high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines |
|
|
|
Texas Instruments |
Octal Bus Transceivers •1 Wide Operating Voltage Range of 2 V to 6 V • High-Current 3-State Outputs Drive Bus Lines Directly or Up to 15 LSTTL Loads • Low Power Consumption, 80-μA Max ICC • Typical tpd = 12 ns • ±6-mA Output Drive at 5 V • Low Input Current of 1 μA Max • O |
|
|
|
Texas Instruments |
3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS ring information NC − No internal connection The ’AHC138 decoders/demultiplexers are designed for high-performance memory-decoding and data-routing applications that require very short propagation-delay times. In high-performance memory systems, th |
|
|
|
Texas Instruments |
Hex Inverters appears at the end of this data sheet. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing |
|
|
|
Texas Instruments |
TRIPLE 3-INPUT POSITIVE-NAND GATES SOIC − D Reel of 2500 Reel of 250 SN74HC10DR SN74HC10DT HC10 −40°C to 85°C SOP − NS SSOP − DB Reel of 2000 Reel of 2000 SN74HC10NSR SN74HC10DBR HC10 HC10 Tube of 90 SN74HC10PW TSSOP − PW Reel of 2000 Reel of 250 SN74HC10PWR SN74HC10PWT |
|
|
|
Texas Instruments |
BCD to Decimal Decoders/Drivers Green (RoHS & no Sb/Br) J 16 1 TBD FK 20 1 TBD A42 A42 A42 CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU A42 POST-PLATE N / A for Pkg Type -55 to 125 N / A for Pkg Type -55 to 125 N / A for Pkg Type N / A |
|
|
|
Texas Instruments |
Octal Transparent D-Type Latche •1 Operating Range 2-V to 5.5-V VCC • 3-State Outputs Directly Drive Bus Lines • Latch-Up Performance Exceeds 250 mA Per JESD 17 • On Products Compliant to MIL-PRF-38535, All Parameters Are Tested Unless Otherwise Noted. On All Other Products, Produc |
|
|
|
Texas Instruments |
Octal Buffers/Drivers •1 Operating Range 2-V to 5.5-V VCC • Latch-Up Performance Exceeds 250 mA Per JESD 17 • On Products Compliant to MIL-PRF-38535, All Parameters Are Tested Unless Otherwise Noted. On All Other Products, Production Processing Does Not Necessarily Includ |
|
|
|
Texas Instruments |
Octal Edge-Triggered D-Type Flip-Flop •1 Operating Range 2-V to 5.5-V VCC • 3-State Outputs Drive Bus Lines Directly • Latch-Up Performance Exceeds 250 mA Per JESD 17 • On Products Compliant to MIL-PRF-38535, All Parameters Are Tested Unless Otherwise Noted. On All Other Products, Produc |
|
|
|
Texas Instruments |
HEX BUFFERS AND LINE DRIVER driver. SN54AHC367, SN74AHC367 HEX BUFFERS AND LINE DRIVERS WITH 3-STATE OUTPUTS SCLS424E – JUNE 1998 – REVISED FEBRUARY 2002 SN54AHC367 . . . J OR W PACKAGE SN74AHC367 . . . D, DB, DGV, N, OR PW PACKAGE (TOP VIEW) 1OE 1 1A1 2 1Y1 3 1A2 4 1Y2 5 1A3 |
|
|
|
Texas Instruments |
QUADRUPLE 2-INPUT POSITIVE-OR GATES 1 • Operating Range 2-V to 5.5-V VCC • Latch-Up Performance Exceeds 250 mA Per JESD 17 • ESD Protection Exceeds JESD 22 – 2000-V Human-Body Model (A114-A) – 200-V Machine Model (A115-A) – 1000-V Charged-Device Model (C101) SN54AHC32 . . . J OR W PA |
|
|
|
Texas Instruments |
HEX BUFFERS AND LINE DRIVER driver. SN54AHC367, SN74AHC367 HEX BUFFERS AND LINE DRIVERS WITH 3-STATE OUTPUTS SCLS424E – JUNE 1998 – REVISED FEBRUARY 2002 SN54AHC367 . . . J OR W PACKAGE SN74AHC367 . . . D, DB, DGV, N, OR PW PACKAGE (TOP VIEW) 1OE 1 1A1 2 1Y1 3 1A2 4 1Y2 5 1A3 |
|
|
|
Texas Instruments |
HEX INVERTER 1 • Operating Range 2-V to 5.5-V • Latch-Up Performance Exceeds 250 mA Per JESD 17 • ESD Protection Exceeds JESD 22 – 2000-V Human-Body Model (A114-A) – 200-V Machine Model (A115-A) – 1000-V Charged-Device Model (C101) SN54AHC04 . . . JORWP ACKAGE |
|
|
|
Texas Instruments |
Quadruple Bus Buffer Gates •1 Operating Range: 2 V to 5.5 V • Latch-Up Performance Exceeds 250 mA Per JESD 17 • Four Individual Output Enable Pins • All Inputs Have Schmitt-Trigger Action 2 Applications • Flow Meters • Programmable Logic Controllers • Power Over Ethernet (PoE) |
|
|
|
Texas Instruments |
DUAL 2-LINE TO 4-LINE DECODERS/DEMULTIPLEXER fully buffered inputs, each of which represents only one normalized load to its driving circuit. FUNCTION TABLE INPUTS SELECT G B A H X X OUTPUTS Y0 Y1 Y2 Y3 H H H H L L L L H H H L L H H L H H L H L H H L H L H |
|
|
|
Texas Instruments |
Hex Inverters appears at the end of this data sheet. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing |
|