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Texas Instruments |
OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. The devices are particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers. On the posit |
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Texas Instruments |
Quadruple 2-Input Positive-NOR Gates A NC 7 15 NC 2A 8 14 3Y 9 10 11 12 13 3B 3A NC GND 2B logic symbol† 2 1A ≥1 1 3 1Y 1B 5 2A 4 6 2Y 2B 8 3A 10 9 3Y 3B 11 4A 13 12 4Y 4B † This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication |
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Texas Instruments |
8-Bit Shift Registers • 8-bit serial-in, parallel-out shift • Wide operating voltage range of 2 V to 6 V • High-current 3-state outputs can drive up to 15 LSTTL loads • Low power consumption: 80-μA (maximum) ICC • tpd = 13 ns (typical) • ±6-mA output drive at 5 V • Low in |
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Texas Instruments |
Hex Schmitt-Trigger Inverters • Buffered inputs • Wide operating voltage range: 2 V to 6 V • Wide operating temperature range: -40°C to +85°C • Supports fanout up to 10 LSTTL loads • Significant power reduction compared to LSTTL logic ICs 2 Applications • Synchronize invterted cl |
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Texas Instruments |
Hex Inverters |
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Texas Instruments |
QUADRUPLE 2-INPUT POSITIVE-AND GATES 75265 SN5408, SN54LS08, SN54S08 SN7408, SN74LS08, SN74S08 QUADRUPLE 2-INPUT POSITIVE-AND GATES SDLS033 – DECEMBER 1983 – REVISED MARCH 1988 •POST OFFICE BOX 655303 DALLAS, TEXAS 75265 5 PACKAGE OPTION ADDENDUM www.ti.com PACKAGING INFORMATION |
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Texas Instruments |
8-Bit Parallel-Out Serial Shift Registers •1 Wide Operating Voltage Range of 2 V to 6 V • Outputs Can Drive Up to 10 LSTTL Loads • Low Power Consumption, 80-μA Maximum ICC • Typical tpd = 20 ns • ±4-mA Output Drive at 5 V • Low Input Current of 1-μA Maximum • AND-Gated (Enable/Disable) Seria |
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Texas Instruments |
16-BIT BUFFERS/DRIVERS tive-low output-enable (OE) inputs. SN54ABT162244 . . . WD PACKAGE SN74ABT162244 . . . DGG, DGV, OR DL PACKAGE (TOP VIEW) 1OE 1 1Y1 2 1Y2 3 GND 4 1Y3 5 1Y4 6 VCC 7 2Y1 8 2Y2 9 GND 10 2Y3 11 2Y4 12 3Y1 13 3Y2 14 GND 15 3Y3 16 3Y4 17 VCC 18 4Y1 19 4Y |
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Texas Instruments |
32-Bit Dual-Supply Bus Transceiver • Member of the Texas Instruments Widebus+™ Family • Control Inputs VIH/VIL Levels Referenced to VCCA Voltage • VCC Isolation Feature – If Either VCC Input is at GND, Both Ports are in the High-Impedance State • Overvoltage-Tolerant Inputs/Outputs Al |
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Texas Instruments |
HEX INVERTER 1 • Operating Range 2-V to 5.5-V • Latch-Up Performance Exceeds 250 mA Per JESD 17 • ESD Protection Exceeds JESD 22 – 2000-V Human-Body Model (A114-A) – 200-V Machine Model (A115-A) – 1000-V Charged-Device Model (C101) SN54AHC04 . . . JORWP ACKAGE |
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Texas Instruments |
8-Bit Shift Registers •1 8-Bit Serial-In, Parallel-Out Shift • Wide Operating Voltage Range of 2 V to 6 V • High-Current 3-State Outputs Can Drive Up to 15 LSTTL Loads • Low Power Consumption: 80-μA (Maximum) ICC • tpd = 13 ns (Typical) • ±6-mA Output Drive at 5 V • Low I |
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Texas Instruments |
8-Bit Parallel-Load Shift Registers •1 Wide Operating Voltage Range of 2 V to 6 V • Outputs Can Drive Up to 10 LSTTL Loads • Low Power Consumption, 80-µA Maximum ICC • Typical tpd = 13 ns • ±4-mA Output Drive at 5 V • Low Input Current of 1 µA Maximum • Complementary Outputs • Direct O |
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Texas Instruments |
8-Bit Parallel-Out Serial Shift Registers •1 Wide Operating Voltage Range of 2 V to 6 V • Outputs Can Drive Up to 10 LSTTL Loads • Low Power Consumption, 80-μA Maximum ICC • Typical tpd = 20 ns • ±4-mA Output Drive at 5 V • Low Input Current of 1-μA Maximum • AND-Gated (Enable/Disable) Seria |
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Texas Instruments |
OCTAL GENERAL-PURPOSE INTERFACE BUS TRANSCEIVERS pnp transistor inputs for high input impedance and hysteresis of 400 mV for increased noise immunity. All receivers have 3-state outputs to present a high impedance to the terminal when disabled. The SN75161B and SN75162B are characterized for operat |
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Texas Instruments |
SCAN TEST DEVICES ndom Pattern Generation From Outputs – Sample Inputs/Toggle Outputs – Binary Count From Outputs – Device Identification – Even-Parity Opcodes D Packaged in 64-Pin Plastic Thin Quad Flat (PM) Packages Using 0.5-mm Center-to-Center Spacings and 68-Pin |
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ETCTI |
Dual Positive-Edge-Triggered D-Type Flip-Flops With Clear And Preset (Rev. C) |
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Texas Instruments |
8-BIT PARALLEL-LOAD SHIFT REGISTERS • Wide operating voltage range of 2 V to 6 V • Outputs can drive up to 10 LSTTL loads • Low power consumption, 80-μA max ICC • Typical tpd = 13 ns • ±4-mA output drive at 5 V • Low input current of 1 μA max • Synchronous load • Direct overriding clea |
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Texas Instruments |
Dual D-Type Positive-Edge Triggered Flip-Flops VEĆEDGEĆTRIGGERED FLIPĆFLOPS WITH PRESET AND CLEAR SDLS119 − DECEMBER 1983 − REVISED MARCH 1988 •4 POST OFFICE BOX 655303 DALLAS, TEXAS 75265 SN5474, SN54LS74A, SN54S74 SN7474. SN74LS74A, SN74S74 DUAL DĆTYPE POSITIVEĆEDGEĆTRIGGERED FLIPĆFLOPS WITH P |
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Texas Instruments |
DUAL DIFFERENTIAL LINE RECEIVERS y of the differential input voltage. The frequency response of each channel can be easily controlled by a single external capacitor to provide immunity to differential noise spikes. The output goes to a high level when the inputs are open circuited. |
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Texas Instruments |
Single Power Supply Single Buffer GATE • Latch-up performance exceeds 250mA per JESD 17 • Single-supply voltage translator at 5V, 3.3V, 2.5V, and 1.8V VCC • Operating range of 1.65V to 5.5V • Up translation: – 1.2V(1) to 1.8V at 1.8V VCC – 1.5V(1) to 2.5V at 2.5V VCC – 1.8V(1) to 3.3V at |
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Desde 2024. D4U Semiconductor.
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