| No. | parte # | Fabricante | Descripción | Hoja de Datos |
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Texas Instruments |
18-Bit Registered Transceivers • FCT-C speed at 4.6 ns • Ioff supports partial-power- mode operation • Edge-rate control circuitry for significantly improved noise characteristics • Typical output skew < 250 ps • ESD > 2000V • TSSOP (19.6-mil pitch) and SSOP (25-mil pitch) packages |
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Texas Instruments |
20-Bit Latches • FCT-C speed at 5.5 ns (FCT16841T Com’l) • Ioff supports partial-power-down mode operation • Edge-rate control circuitry for significantly improved noise characteristics • Typical output skew < 250 ps • ESD > 2000V • TSSOP (19.6-mil pitch) and SSOP ( |
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Texas Instruments |
18-Bit Registers • Ioff supports partial-power-down mode operation • Edge-rate control circuitry for significantly improved noise characteristics • Typical output skew < 250 ps • ESD > 2000V • TSSOP (19.6-mil pitch) and SSOP (25-mil pitch) packages • Industrial temper |
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Texas Instruments |
16-Bit Buffers/Line Drivers • Ioff supports partial-power-down mode operation • Edge-rate control circuitry for significantly improved noise characteristics • Typical output skew < 250 ps • ESD > 2000V • TSSOP (19.6-mil pitch) and SSOP (25-mil pitch) packages • Industrial temper |
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Texas Instruments |
8-BIT LATCHED TRANSCEIVER 3 OEAB description The CY74FCT2543T octal latched transceiver contains two sets of eight D-type latches. Separate latch enable (LEAB, LEBA) and output enable (OEAB, OEBA) inputs permit each latch set to have independent control of inputting and out |
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Texas Instruments |
8-BIT BUFFERS/LINE DRIVERS 0 OEA VCC OEB DA1 OB1 DA2 OB2 DA3 3 2 1 20 19 4 18 5 17 6 16 7 15 8 14 9 10 11 12 13 OA0 DB0 OA1 DB1 OA2 OB 3 GND DB 3 OA 3 DB 2 description The ’FCT244T devices are octal buffers and line drivers designed to be employed as memory address driver |
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Texas Instruments |
18-Bit Registered Transceivers • Ioff supports partial-power-down mode operation • Edge-rate control circuitry for significantly improved noise characteristics • Typical output skew < 250 ps • ESD > 2000V • TSSOP (19.6 mil pitch) and SSOP (25-mil pitch) packages • Industrial temper |
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Texas Instruments |
20-Bit Buffers/Line Drivers • Ioff Supports Partial-Power-Down Mode Operation • Edge-rate control circuitry for significantly improved noise characteristics • Typical output skew < 250 ps • ESD > 2000V • TSSOP (19.6-mil pitch) and SSOP (25-mil pitch) packages • Industrial temper |
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Texas Instruments |
18-Bit Registered Transceivers • Ioff supports partial-power-down mode operation • Edge-rate control circuitry for significantly improved noise characteristics • Typical output skew < 250 ps • ESD > 2000V • TSSOP (19.6 mil pitch) and SSOP (25-mil pitch) packages • Industrial temper |
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Texas Instruments |
QUAD 2-INPUT MULTIPLEXER , and the I1 inputs are selected when S is high. Data at the output is noninverted. The CY74FCT257T is a logic implementation of a four-pole, two-position switch, where the position of the switch is determined by the logic levels at S. Outputs are in |
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Texas Instruments |
10-BIT BUS-INTERFACE REGISTER packages required to buffer existing registers and provide extra data width for wider address/data paths or buses carrying parity. The CY74FCT821T is a 10-bit-wide buffered version of the popular CY74FCT374 function. This device is ideal for use as |
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Texas Instruments |
8-BIT REGISTERS to the corresponding flip-flop’s Q output. All outputs are forced low by a low logic level on the MR input. This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging c |
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Texas Instruments |
16-Bit Registers • Ioff supports partial-power-down mode operation • Edge-rate control circuitry for significantly improved noise characteristics • Typical output skew < 250 ps • ESD > 2000V • TSSOP (19.6-mil pitch) and SSOP (25-mil pitch) packages • Industrial temper |
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Texas Instruments |
16-Bit Latches • Ioff supports partial-power-down mode operation • Edge-rate control circuitry for significantly improved noise characteristics • Typical output skew < 250 ps • ESD > 2000V • TSSOP (19.6-mil pitch) and SSOP (25-mil pitch) packages • Industrial temper |
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Texas Instruments |
16-Bit Latches • Ioff supports partial-power-down mode operation • Edge-rate control circuitry for significantly improved noise characteristics • Typical output skew < 250 ps • ESD > 2000V • TSSOP (19.6-mil pitch) and SSOP (25-mil pitch) packages • Industrial temper |
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Texas Instruments |
16-Bit Transceivers • Ioff supports partial-power-down mode operation • Edge-rate control circuitry for significantly improved noise characteristics • Typical output skew < 250 ps • ESD > 2000V • TSSOP (19.6-mil pitch) and SSOP (25-mil pitch) packages • Industrial temper |
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Texas Instruments |
16-Bit Buffers/Line Drivers • Ioff supports partial-power-down mode operation • Edge-rate control circuitry for significantly improved noise characteristics • Typical output skew < 250 ps • ESD > 2000V • TSSOP (19.6-mil pitch) and SSOP (25-mil pitch) packages • Industrial temper |
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Texas Instruments |
16-Bit Registered Transceivers • Ioff supports partial-power-down mode operation • Edge-rate control circuitry for significantly improved noise characteristics • Typical output skew < 250 ps • ESD > 2000V • TSSOP (19.6-mil pitch) and SSOP (25-mil pitch) packages • Industrial temper |
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Texas Instruments |
8-BIT REGISTERED TRANSCEIVERS urce Current D CY74FCT646T – 64-mA Output Sink Current – 32-mA Output Source Current D 3-State Outputs 4 3 2 1 28 27 26 A1 5 25 G A2 6 24 B1 A3 7 23 B2 NC 8 22 NC description The ’FCT646T devices consist of a bus transceiver circuit with 3 |
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Texas Instruments |
10-BIT BUFFER address paths or buses carrying parity. This 10-bit buffer has NANDed output-enable (OE) inputs for maximum control flexibility. The CY74FCT2827T is designed for high-capacitance-load drive capability, while providing low-capacitance bus loading at b |
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Desde 2024. D4U Semiconductor.
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