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etcTI CY5 DataSheet

No. parte # Fabricante Descripción Hoja de Datos
1
CY54FCT373T

Texas Instruments
8-BIT LATCHES
tate outputs for bus-organized applications. When the latch-enable (LE) input is high, the flip-flops appear transparent to the data. Data that meets the required setup times are latched when LE transitions from high to low. Data appears on the bus w
Datasheet
2
CY54FCT646T

Texas Instruments
8-BIT REGISTERED TRANSCEIVERS
urce Current D CY74FCT646T
  – 64-mA Output Sink Current
  – 32-mA Output Source Current D 3-State Outputs 4 3 2 1 28 27 26 A1 5 25 G A2 6 24 B1 A3 7 23 B2 NC 8 22 NC description The ’FCT646T devices consist of a bus transceiver circuit with 3
Datasheet
3
CY54FCT841T

Texas Instruments
10-BIT LATCHES
21 Y2 20 Y3 19 Y4 18 Y5 17 Y6 16 Y7 15 Y8 14 Y9 13 LE description The ’FCT841T bus-interface latches are designed to eliminate additional packages required to buffer existing latches and provide additional data width for wider address/data paths or
Datasheet
4
CY54FCT377T

Texas Instruments
8-BIT REGISTERS
SN54FCT377T . . . L PACKAGE (TOP VIEW) VCC 3 2 1 20 19 D1 4 18 D7 O1 5 17 D6 O2 6 16 O6 D2 7 15 O5 D3 8 14 9 10 11 12 13 D5 O3 D0 GND O0 description The ’FCT377T devices have eight triggered D-type flip-flops with individual data (D)
Datasheet
5
CY54FCT273T

Texas Instruments
8-BIT REGISTERS
to the corresponding flip-flop’s Q output. All outputs are forced low by a low logic level on the MR input. This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging c
Datasheet
6
CY54FCT827T

Texas Instruments
10-BIT BUFFERS
lexibility. The ’FCT827T devices are designed for high-capacitance-load drive capability, while providing low-capacitance bus loading at both inputs and outputs. All outputs are designed for low-capacitance bus loading in the high-impedance state. C
Datasheet
7
CY54FCT244T

Texas Instruments
8-BIT BUFFERS/LINE DRIVERS
0 OEA VCC OEB DA1 OB1 DA2 OB2 DA3 3 2 1 20 19 4 18 5 17 6 16 7 15 8 14 9 10 11 12 13 OA0 DB0 OA1 DB1 OA2 OB 3 GND DB 3 OA 3 DB 2 description The ’FCT244T devices are octal buffers and line drivers designed to be employed as memory address driver
Datasheet
8
CY54FCT157T

Texas Instruments
QUAD 2-INPUT MULTIPLEXERS
7 I1d NC 6 16 NC I0b 7 15 Yd I1b 8 14 I0c 9 10 11 12 13 Yb GND NC Yc I1c description NC
  – No internal connection The ’FCT157T devices are quad two-input multiplexers that select four bits of data from two sources under the control of a com
Datasheet
9
CY54FCT138T

Texas Instruments
1-OF-8 DECODERS
three enable inputs: two active low (E1, E2) and one active high (E3). All outputs are high unless E1 and E2 are low and E3 is high. This multiple-enable function allows easy parallel expansion of the device to a 1-of-32 (five lines to 32 lines) deco
Datasheet
10
CY54FCT240T

Texas Instruments
8-BIT BUFFERS/LINE DRIVERS
L PACKAGE (TOP VIEW) OB0 DA 0 OEA VCC OEB DA1 OB1 DA2 OB2 DA3 3 2 1 20 19 4 18 5 17 6 16 7 15 8 14 9 10 11 12 13 OA0 DB0 OA1 DB1 OA2 OB 3 GND DB 3 OA 3 DB 2 The ’FCT240T devices are octal buffers and line drivers designed to be employed as memo
Datasheet
11
CY54FCT541T

Texas Instruments
8-BIT BUFFERS/LINE DRIVERS
EA VCC OEB D2 3 2 1 20 19 4 18 O0 D3 5 17 O1 D4 6 16 O2 D5 7 15 O3 D6 8 14 9 10 11 12 13 O4 D7 GND O7 O6 O5 The ’FCT541T noninverting buffers/line drivers can be employed as memory address drivers, clock drivers, and bus-oriented transm
Datasheet
12
CY54FCT574T

Texas Instruments
8-BIT REGISTERS
1 CP CY54FCT574T . . . L PACKAGE (TOP VIEW) VCC D2 3 2 1 20 19 4 18 O1 D3 5 17 O2 D4 6 16 O3 D5 7 15 O4 D6 8 14 9 10 11 12 13 O5 D7 D1 GND D0 description The ’FCT574T devices are high-speed, low-power, octal D-type flip-flops, featuri
Datasheet
13
CY54FCT543T

Texas Instruments
8-BIT LATCHED REGISTERED TRANSCEIVERS
10 11 12 24 VCC 23 CEBA 22 B0 21 B1 20 B2 19 B3 18 B4 17 B5 16 B6 15 B7 14 LEAB 13 OEAB description The ’FCT543T octal latched transceivers contain two sets of eight D-type latches with separate latch-enable (LEAB, LEBA) and output-enable (OEAB, O
Datasheet
14
CY54FCT573T

Texas Instruments
8-BIT LATCHES
bus-organized applications. When the latch-enable (LE) input is high, the flip-flops appear transparent to the data. Data that meets the required setup times are latched when LE transitions from high to low. Data appears on the bus when the output-e
Datasheet
15
CY54FCT540T

Texas Instruments
8-BIT BUFFERS/LINE DRIVERS
) D1 D0 VOCECA OEB D2 3 2 1 20 19 4 18 O0 D3 5 17 O1 D4 6 16 O2 D5 7 15 O3 D6 8 14 9 10 11 12 13 O4 D7 GND O7 O6 O5 The ’FCT540T inverting buffers/line drivers can be employed as memory address drivers, clock drivers, and bus-oriented t
Datasheet
16
CY54FCT374T

Texas Instruments
8-BIT REGISTERS
2 O4 11 CP CY54FCT374T . . . L PACKAGE (TOP VIEW) D0 O0 OE VCC O7 D1 3 2 1 20 19 4 18 D7 O1 5 17 D6 O2 6 16 O6 D2 7 15 O5 D3 8 14 9 10 11 12 13 D5 O3 GND CP O4 D4 description The ’FCT374T devices are high-speed, low-power, octal D-typ
Datasheet
17
CY54FCT245T

Texas Instruments
8-BIT TRANSCEIVERS
T/R VCC 3 2 1 20 19 A2 4 18 B0 A3 5 17 B1 A4 6 16 B2 A5 7 15 B3 A6 8 14 9 10 11 12 13 B4 B5 OE A7 A1 GND A0 B7 B6 The ’FCT245T devices contain eight noninverting bidirectional buffers with 3-state outputs and are intended for bus-ori
Datasheet
18
CY54FCT163T

Texas Instruments
4-BIT BINARY COUNTERS
10 11 12 13 CEP GND NC PE CET description The ’FCT163T devices are high-speed NC
  – No internal connection synchronous modulo-16 binary counters. They are synchronously presettable for application in programmable dividers. These devices have tw
Datasheet



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