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Silicon Laboratories |
Clock Synthesizer • Compliant with Intel® CK 408 Mobile Clock Synthesizer specifications • 3.3V power supply • 3 differential CPU clocks • 10 copies of PCI clocks • 5/6 copies of 3V66 clocks • SMBus support with Read Back capabilities Table 1. Frequency Table[1] S2 |
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Silicon Laboratories |
Differential Clock Buffer/Driver • Phase-locked loop (PLL) clock distribution for Double Data Rate Synchronous DRAM applications • 1:5 differential outputs • External feedback pins (FBINT, FBINC) are used to synchronize the outputs to the clock input • SSCG: Spread Aware™ for electr |
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Silicon Laboratories |
100MHz Differential Buffer • CK409 and CK410 companion buffer • Four differential 0.7V clock output pairs • OE_INV input for inverting OE, PWRDWN, and SRC_STP active levels • Individual OE controls • Low CTC jitter (< 50 ps) • Programmable bandwidth • SRC_STP power management |
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Silicon Laboratories |
Differential Clock Buffer/Driver • Phase-locked loop clock distribution for Double Data Rate Synchronous DRAM applications • 1:10 differential outputs • External Feedback pins (FBINT, FBINC) are used to synchronize the outputs to the clock input • SSCG: Spread Aware™ for EMI reducti |
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Silicon Laboratories |
100MHz Differential Buffer Functional Description • CK409 or CK410 companion buffer • Eight differential 0.7V clock pairs • Individual OE controls • Low CTC jitter (< 50 ps) • Programmable bandwidth • SRC_STOP# power management control • SMBus Block/Byte/Word Read and Write |
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Silicon Laboratories |
Clock Generator • Compliant to Intel CK410M • Supports Intel Pentium-M CPU • Selectable CPU frequencies • Differential CPU clock pairs • 100 MHz differential SRC clocks • 96 MHz differential dot clock • 48 MHz USB clocks CY28411 Clock Generator for Intel®Alviso Ch |
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Silicon Laboratories |
Differential Clock Buffer/Driver DDR333/PC2700-Compliant • Operating frequency: 60 MHz to 200 MHz • Supports 266, 333 MHz DDR SDRAM • 10 differential outputs from 1 differential input • Spread-Spectrum-compatible • Low jitter (cycle-to-cycle): < 75 • Very low skew: < 100 ps • Power management control input |
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Silicon Laboratories |
Differential Clock Buffer/Driver DDR400/PC3200-Compliant • Operating frequency: 60 MHz to 230 MHz • Supports 400 MHz DDR SDRAM • 10 differential outputs from one differential input • Spread-Spectrum-compatible • Low jitter (cycle-to-cycle): < 75 • Very low skew: < 100 ps • Power management control input • |
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Silicon Laboratories |
100MHz Differential Buffer • CK409 or CK410 companion buffer • Four differential 0.7V clock pairs • Individual OE controls • Low CTC jitter (< 50 ps) • Programmable bandwidth • SRC_STOP# power management control • SMBus Block/Byte/Word Read and Write support • 3.3V operation • |
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Silicon Laboratories |
FTG for Pentium 4 and Intel 845 Series Chipset • Compatible with Intel® CK-Titan and CK-408 Clock Synthesizer/Driver specifications • System frequency synthesizer for Intel Brookdale 845 and Brookdale – G Pentium 4® chipsets • Programmable clock output frequency with less than 1-MHz increment • I |
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Silicon Laboratories |
210MHz 24 Output Buffer Functional Description • Supports VIA PRO 266, KT266 and P4x266 • Dual 1- to 12-output buffer/driver • Supports up to four DDR DIMMs • Low-skew outputs (< 75 ps) • Supports 266-MHz, 333-MHz and 400-MHz DDR SDRAM • SMBus Read and Write support • Spa |
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Silicon Laboratories |
Universal Clock Generator • Compliant to Intel CK505 • Selectable CPU clock buffer type for Intel P4 or K8 selection • Selectable CPU frequencies • Universal clock to support Intel, SiS and VIA platform • 0.7V Differential CPU clock for Intel CPU • 3.3V Differential CPU cloc |
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Desde 2024. D4U Semiconductor.
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