No. | parte # | Fabricante | Descripción | Hoja de Datos |
---|---|---|---|---|
|
|
Samsung |
TIMING & SYNC. GENERATOR FOR B/W CCD - Compatible with both EIA and CCIR mode (EIA : KC73125(U)-M, CCIR : KC73129(U)-M) - Built in auto iris function (Electronic Exposure) - Mirror mode timing generation - Field interlace mode only - Timing and sync one chip IC - Oscillation frequency E |
|
|
|
Samsung |
TIMING & SYNC. GENERATOR FOR B/W CCD |
|
|
|
Samsung semiconductor |
DIGITAL CAMERA PROCESSOR • • • • • • • • • • • • • Device KS7306 Package 100-QFP-1414 Operating Temperature 0 ~ 70 °C Offers 10 bit input digital signal processing. Carries built-in 2H line memory.(10bit 1024) Performs Y signal processing. Performs C signal processing. Car |
|
|
|
Samsung |
Hex Inverters |
|
|
|
Samsung |
(KS74AHCT75 / KS74AHCT77) 4-Bit Bistable Latches |
|
|
|
Samsung |
Quad Exclusive-NOR Gates |
|
|
|
Samsung |
Octal D-Type Flip-Flops |
|
|
|
Samsung Electronics |
(KS74AHCT590 / KS74AHCT591) 8-Bit Binary Counters |
|
|
|
Samsung |
TIMING & SYNC. GENERATOR FOR B/W CCD COUNTER) M I X V PULSE GENERATOR 21 22 24 25 26 27 28 29 VRN 43 V SYNC SEPARATOR VD HD PHASE COMPARATOR 38 PC HRN 44 MD2 MD3 MD4 SM0 SM1 SM2 EES FL 2 3 4 6 7 8 9 10 H SYNC SEPARATOR CONTROL SIGNAL GENERATOR ROM1 (AUTO EXPOSURE) ROM2 (FIX |
|
|
|
Samsung semiconductor |
digital image signal handling IC • • • • • • • • • • • • • • NTSC/PAL, Normal/Hiband, DVC compatible 10-bit A/D input Digital clamp WDR expansion using non-linear histogram modification Look up table (LUT) transform using line memory S1, S2 signals' HUE component correction by look- |
|
|
|
Samsung semiconductor |
DIGITAL ZOOM Device KS7314 Package 80-QFP-1212 Operating Temperature 0 ~ +70 ° C - 256 discrete zoom steps. - Field memoriless zoom operation. - Vertical image expansion and vertical interpolation by the control of a built-in 2H delay line. - Zoom operation depe |
|
|
|
Samsung semiconductor |
FCM - 1024X10bits 2 bank Line memory. - Independent Read/Write Operation. - Programmable Read Start Address and Write Start Address. - HD Pre-counter for Horizontal blanking. - Serial-Interface Circuit - CMOS Double metal technology - 5V Power supply OR |
|
|
|
Samsung semiconductor |
DIGITAL CAMERA PROCESSOR - Luminance & Chroma Signal Procession - Built in Timing Generator - Built in Sync. Generator - Built in Memory for Detection Part (16bit* 64 word*2 page) - Built in 1H delay line (1H *2, 8 bit *910) - Built in Encoder for PAL/NTSC - Built in DIS Int |
|
|
|
Samsung semiconductor |
Digital Image Stabilization and Digital Zoom Processor • • • • • • • • • • • NTSC/PAL, normal/hi-band, DVC correspondence 10 bit S1S2 format A/D signal input (new) 10 bit S1S2 signal output for DCP I/F Sub-pixel resolution animation movement detection and compensation (new) Adaptable IIR filtering for sh |
|
|
|
Samsung |
(KS74AHCT843 / KS74AHCT844) 9-Bit Bus Interface D-Type Latches |
|
|
|
Samsung |
(KS74AHCT843 / KS74AHCT844) 9-Bit Bus Interface D-Type Latches |
|
|
|
Samsung |
(KS74AHCT841 / KS74AHCT842) 10-Bit Bus Interface D-Type Latches |
|
|
|
Samsung |
(KS74AHCT841 / KS74AHCT842) 10-Bit Bus Interface D-Type Latches |
|
|
|
Samsung |
(KS74AHCT4049 / KS74AHCT4050) Hex Logic Level Down Converters |
|
|
|
Samsung |
(KS74AHCT4049 / KS74AHCT4050) Hex Logic Level Down Converters |
|