| No. | parte # | Fabricante | Descripción | Hoja de Datos |
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STMicroelectronics |
24 MHz STM8S 8-bit MCU Core – Max fCPU: up to 24 MHz, 0 wait states @ fCPU 16 MHz – Advanced STM8 core with Harvard architecture and 3-stage pipeline – Extended instruction set – Max 20 MIPS @ 24 MHz Memories – Program: up to 128 Kbytes Flash; data retention 20 year |
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STMicroelectronics |
8-bit MCU Core • 16 MHz advanced STM8 core with Harvard architecture and 3-stage pipeline • Extended instruction set Memories • Program memory: 8 Kbyte Flash memory; data retention 20 years at 55 °C after 100 cycles • RAM: 1 Kbyte • Data memory: 128 bytes tru |
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STMicroelectronics |
8-bit MCU Core • 16 MHz advanced STM8 core with Harvard architecture and 3-stage pipeline • Extended instruction set Memories • Program memory: 8 Kbyte Flash memory; data retention 20 years at 55 °C after 100 cycles • RAM: 1 Kbyte • Data memory: 128 bytes tru |
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STMicroelectronics |
8-bit ultra-low-power MCU • Operating conditions – Operating power supply: 1.65 to 3.6 V (without BOR), 1.8 to 3.6 V (with BOR) – Temperature range: -40 to 85 or 125 °C • Low power features – 5 low-power modes: Wait, Low power run, Low-power wait, Active-halt with RTC, Halt – |
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STMicroelectronics |
8-bit ultra-low-power MCU • Operating conditions – Operating power supply: 1.65 to 3.6 V (without BOR), 1.8 to 3.6 V (with BOR) – Temperature range: -40 to 85 or 125 °C • Low power features – 5 low-power modes: Wait, Low power run, Low-power wait, Active-halt with RTC, Halt – |
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STMicroelectronics |
Automotive 8-bit MCU • AEC-Q10x qualified • Core – Max fCPU: 24 MHz – Advanced STM8A core with Harvard architecture and 3-stage pipeline – Average 1.6 cycles/instruction resulting in 10 MIPS at 16 MHz fCPU for industry standard benchmark • Memories – Program memory: 32 t |
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STMicroelectronics |
Automotive 8-bit MCU • AEC-Q10x qualified • Core – Max fCPU: 24 MHz – Advanced STM8A core with Harvard architecture and 3-stage pipeline – Average 1.6 cycles/instruction resulting in 10 MIPS at 16 MHz fCPU for industry standard benchmark • Memories – Program memory: 32 t |
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STMicroelectronics |
Automotive 8-bit MCU • AEC-Q10x qualified • Core – Max fCPU: 24 MHz – Advanced STM8A core with Harvard architecture and 3-stage pipeline – Average 1.6 cycles/instruction resulting in 10 MIPS at 16 MHz fCPU for industry standard benchmark • Memories – Program memory: 32 t |
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STMicroelectronics |
Automotive 8-bit MCU • AEC-Q10x qualified • Core – Max fCPU: 24 MHz – Advanced STM8A core with Harvard architecture and 3-stage pipeline – Average 1.6 cycles/instruction resulting in 10 MIPS at 16 MHz fCPU for industry standard benchmark • Memories – Program memory: 32 t |
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STMicroelectronics |
8-bit ultra-low-power MCU • Operating conditions – Operating power supply: 1.65 to 3.6 V (without BOR), 1.8 to 3.6 V (with BOR) – Temp. range: -40 to 85, 105 or 125 °C • Low-power features – 5 low-power modes: Wait, Low-power run (5.9 µA), Low-power wait (3 µA), Activehalt wi |
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STMicroelectronics |
STM8S003K3 Core • 16 MHz advanced STM8 core with Harvard architecture and 3-stage pipeline • Extended instruction set Memories • Program memory: 8 Kbyte Flash memory; data retention 20 years at 55 °C after 100 cycles • RAM: 1 Kbyte • Data memory: 128 bytes tru |
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STMicroelectronics |
8-bit MCU Core • 16 MHz advanced STM8 core with Harvard architecture and 3-stage pipeline • Extended instruction set Memories • Program memory: 8 Kbyte Flash memory; data retention 20 years at 55 °C after 100 cycles • RAM: 1 Kbyte • Data memory: 128 bytes tru |
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STMicroelectronics |
8-bit MCU Core Max fCPU: 16 MHz Advanced STM8 core with Harvard architecture and 3-stage pipeline Extended instruction set Memories Medium-density Flash/EEPROM – Program memory: 32 Kbytes of Flash memory; data retention 20 years at 55 °C after 100 cyc |
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STMicroelectronics |
Automotive 8-bit MCU • AEC-Q10x qualified • Core – Max fCPU: 24 MHz – Advanced STM8A core with Harvard architecture and 3-stage pipeline – Average 1.6 cycles/instruction resulting in 10 MIPS at 16 MHz fCPU for industry standard benchmark • Memories – Program memory: 32 t |
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|
|
STMicroelectronics |
Automotive 8-bit MCU • AEC-Q10x qualified • Core – Max fCPU: 24 MHz – Advanced STM8A core with Harvard architecture and 3-stage pipeline – Average 1.6 cycles/instruction resulting in 10 MIPS at 16 MHz fCPU for industry standard benchmark • Memories – Program memory: 32 t |
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|
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|
STMicroelectronics |
Automotive 8-bit MCU • AEC-Q10x qualified • Core – Max fCPU: 24 MHz – Advanced STM8A core with Harvard architecture and 3-stage pipeline – Average 1.6 cycles/instruction resulting in 10 MIPS at 16 MHz fCPU for industry standard benchmark • Memories – Program memory: 32 t |
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|
STMicroelectronics |
Automotive 8-bit MCU • AEC-Q10x qualified • Core – Max fCPU: 24 MHz – Advanced STM8A core with Harvard architecture and 3-stage pipeline – Average 1.6 cycles/instruction resulting in 10 MIPS at 16 MHz fCPU for industry standard benchmark • Memories – Program memory: 32 t |
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STMicroelectronics |
Automotive 8-bit MCU • AEC-Q10x qualified • Core – Max fCPU: 24 MHz – Advanced STM8A core with Harvard architecture and 3-stage pipeline – Average 1.6 cycles/instruction resulting in 10 MIPS at 16 MHz fCPU for industry standard benchmark • Memories – Program memory: 32 t |
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STMicroelectronics |
RF POWER MODULE MOBILE APPLICATIONS Voltage P IN P OUT T S TG TC RF Input Power RF Output Power Storage Temperature Operating Case Temperature 16 400 25 − 30 to +100 − 30 to +100 Vdc mW W °C °C TSTM872-20 ELECTRICAL SPECIFICATIONS (T case = 25 °C, VS1 , VS2, VS3 = 12.5 Volts unless |
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STMicroelectronics |
16MHz STM8S 8-bit MCU Core • 16 MHz advanced STM8 core with Harvard architecture and 3-stage pipeline • Extended instruction set Memories • Program memory: 8 Kbyte Flash; data retention 20 years at 55 °C after 10 kcycle • Data memory: 640 byte true data EEPROM; endurance |
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Desde 2024. D4U Semiconductor.
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