| No. | parte # | Fabricante | Descripción | Hoja de Datos |
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STMicroelectronics |
SUPPLY VOLTAGE SUPERVISORS ycles, the device internal time delay is determined by an external time delay is determined by an external capacitor connected to the CT input (pin 3). td = 1.3 x 104 x CT Where : CT is in farads (F) and td in seconds (s). In addition, when the suppl |
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STMicroelectronics |
MEDIUM VOLTAGE FAST-SWITCHING NPN POWER TRANSISTOR -Base Voltage (IC = 0) Collector Current Collector Peak Current (tp < 5ms) Base Current Base Peak Current (tp < 5ms) Total Dissipation at TC = 25 oC Storage Temperature Max. Operating Junction Temperature Value 700 400 9 0.6 1.5 0.4 0.75 0.95 -65 to |
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STMicroelectronics |
N-channel Power MOSFET Order code VDSS STL70N10F3 100 V RDS(on) max @VGS=10V 0.0084 Ω ID PTOT 16 A 136 W ■ Improved die-to-footprint ratio ■ Very low thermal resistance ■ Low on-resistance Applications ■ Switching applications Description This device is an N-channel |
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STMicroelectronics |
MEDIUM VOLTAGE FAST-SWITCHING NPN POWER TRANSISTOR = 0) Emitter-Base Voltage (IC = 0) Collector Current Collector Peak Current (tp < 5ms) Base Current Base Peak Current (tp < 5ms) Total Dissipation at TC = 25 oC Storage Temperature Max. Operating Junction Temperature Value 700 400 9 1 2 0.5 1 1 -65 t |
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STMicroelectronics |
N-channel Power MOSFET Type STL75NH3LL VDSS 30V RDS(on) max ID < 0.0057 Ω 20 A (1) 1. This value is according Rthj-pcb ■ ■ ■ ■ ■ Improved die-to-footprint ratio Very low profile package (1mm max) Very low thermal resistance Very low gate charge Low threshold device Powe |
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STMicroelectronics |
N-channel Power MOSFET 1 2 3 4 PowerFLAT™ 3.3x3.3 Figure 1. Internal schematic diagram D(5, 6, 7, 8) 8 76 5 G(4) Order code STL7N10F7 VDS 100 V RDS(on) max 0.035 Ω ID 7A • N-channel enhancement mode • Lower RDS(on) x area vs previous generation • 100% avalanche r |
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STMicroelectronics |
N-CHANNEL POWER MOSFET Order code STL75N8LF6 VDSS 80 V RDS(on) max < 7.4 mΩ ID 18 A (1) 1. The value is rated according Rthj-pcb ■ RDS(on) * Qg industry benchmark ■ Extremely low on-resistance RDS(on) ■ High avalanche ruggedness ■ Low gate drive power losses Applicat |
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STMicroelectronics |
SUPPLY VOLTAGE SUPERVISORS ycles, the device internal time delay is determined by an external time delay is determined by an external capacitor connected to the CT input (pin 3). td = 1.3 x 104 x CT Where : CT is in farads (F) and td in seconds (s). In addition, when the suppl |
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STMicroelectronics |
N-channel Power MOSFET Order code STL7LN80K5 VDS 800 V RDS(on) max. 1.15 Ω ID 5A Industry’s lowest RDS(on) x area Industry’s best figure of merit (FoM) Ultra-low gate charge 100% avalanche tested Zener-protected Applications Switching applications Descripti |
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STMicroelectronics |
N-channel Power MOSFET STL70N4LLF5 N-channel 40 V, 0.0055 Ω, 18 A, PowerFLAT™ (6x5) STripFET™ V Power MOSFET Preliminary Data Type STL70N4LLF5 VDSS 40 V RDS(on) max 0.0065 Ω ID 18 A (1) 1. The value is rated according Rthj-pcb ■ RDS(on) * Qg industry benchmark ■ Extr |
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STMicroelectronics |
SUPPLY VOLTAGE SUPERVISORS ycles, the device internal time delay is determined by an external time delay is determined by an external capacitor connected to the CT input (pin 3). td = 1.3 x 104 x CT Where : CT is in farads (F) and td in seconds (s). In addition, when the suppl |
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STMicroelectronics |
SUPPLY VOLTAGE SUPERVISORS ycles, the device internal time delay is determined by an external time delay is determined by an external capacitor connected to the CT input (pin 3). td = 1.3 x 104 x CT Where : CT is in farads (F) and td in seconds (s). In addition, when the suppl |
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STMicroelectronics |
SUPPLY VOLTAGE SUPERVISORS ycles, the device internal time delay is determined by an external time delay is determined by an external capacitor connected to the CT input (pin 3). td = 1.3 x 104 x CT Where : CT is in farads (F) and td in seconds (s). In addition, when the suppl |
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STMicroelectronics |
SUPPLY VOLTAGE SUPERVISORS ycles, the device internal time delay is determined by an external time delay is determined by an external capacitor connected to the CT input (pin 3). td = 1.3 x 104 x CT Where : CT is in farads (F) and td in seconds (s). In addition, when the suppl |
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STMicroelectronics |
Dual N-channel Power MOSFET Order code STL7DN6LF3 VDS 60 V RDS(on) max 43 mΩ ID 6.5 A • Designed for automotive application and AEC-Q101 qualified • Logic level VGS(th) • 175 °C junction temperature • 100% avalanche rated • Wettable flank package Figure 1. Internal schema |
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STMicroelectronics |
N-channel Power MOSFET Order code STL7NM60N VDSS @ TJMAX 650 V RDS(on) max. < 0.90 Ω ID 5.8 A(1) 1. The value is rated according Rthj-case ■ 100% avalanche tested ■ Low input capacitance and gate charge ■ Low gate input resistance Application ■ Switching application |
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STMicroelectronics |
N-channel Power MOSFET 1 2 3 4 PowerFLAT™5x6 Order code STL7N6LF3 VDS 60 V RDS(on) max 43 mΩ ID 6.5 A • Designed for automotive applications and AEC-Q101 qualified • Logic level VGS(th) • 175 °C junction temperature • 100% avalanche rated • Wettable flank package Fi |
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STMicroelectronics |
N-channel Power MOSFET Order code STL7N6F7 VDS 60 V RDS(on) max 0.025 Ω ID 7A Among the lowest RDS(on) on the market Excellent figure of merit (FoM) Low Crss/Ciss ratio for EMI immunity High avalanche ruggedness Applications Switching applications Description |
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STMicroelectronics |
N-channel Power MOSFET Order code VDS RDS(on) max. ID STL7LN65K5AG 650 V 1.15 Ω 5A • AEC-Q101 qualified • Industry’s lowest RDS(on) x area • Industry’s best FoM (figure of merit) • Ultra-low gate charge • 100% avalanche tested • Zener-protected Applications • Swit |
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STMicroelectronics |
SUPPLY VOLTAGE SUPERVISORS ycles, the device internal time delay is determined by an external time delay is determined by an external capacitor connected to the CT input (pin 3). td = 1.3 x 104 x CT Where : CT is in farads (F) and td in seconds (s). In addition, when the suppl |
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Desde 2024. D4U Semiconductor.
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