No. | parte # | Fabricante | Descripción | Hoja de Datos |
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STMicroelectronics |
ultralow voltage supervisor • Quintuple voltage monitoring • Accurate ±1.8 % across temperature voltage threshold (±1 % at 25 °C) • Primary supply (VCC) monitor. Fixed (factory - programmed) reset thresholds: 3.078 V to 2.866 V • Second fixed (V2IN) monitor. Fixed (factoryprogr |
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STMicroelectronics |
5V supervisor ■ 5 V operating voltage ■ NVRAM supervisor for external LPSRAM ■ Chip-enable gating (STM818 only) for external LPSRAM (7 ns max prop delay) ■ RST and RST outputs ■ 200 ms (typ) trec ■ Watchdog timer - 1.6 sec (typ) ■ Automatic battery switchover ■ Lo |
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STMicroelectronics |
32 Mbit (2Mb x16) 1.8V Asynchronous PSRAM SUMMARY ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ SUPPLY VOLTAGE: 1.65 to 1.95V ACCESS TIMES: 70ns, 80ns, 85ns LOW STANDBY CURRENT: 100µA DEEP POWER-DOWN CURRENT: 10µA BYTE CONTROL: UB/LB PROGRAMMABLE PARTIAL ARRAY COMPATIBLE WITH STANDARD LPSRAM TRI-STATE COMMON I/O |
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STMicroelectronics |
16 Mbit (1M x16) 3V Asynchronous PSRAM SUMMARY ■ ■ ■ ■ ■ ■ SUPPLY VOLTAGE: 2.7 to 3.3V ACCESS TIME: 60ns, 70ns LOW STANDBY CURRENT: 70µA DEEP POWER DOWN CURRENT: 10µA LOW VCC DATA RETENTION: 2.3V COMPATIBLE WITH STANDARD LPSRAM Figure 1. Package BGA TFBGA48 (ZB) 6x8 mm September 2004 |
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STMicroelectronics |
16 Mbit (1M x16) 3V Asynchronous PSRAM SUMMARY ■ ■ ■ ■ ■ ■ SUPPLY VOLTAGE: 2.7 to 3.3V ACCESS TIME: 60ns LOW STANDBY CURRENT: 70µA DEEP POWER DOWN CURRENT: 10µA COMPATIBLE WITH STANDARD LPSRAM TFBGA48 PACKAGE RoHS COMPLIANT (directive 2002/95/EC of the European Parliament) Figure 1. Pac |
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STMicroelectronics |
32 Mbit (2M x16) 3V Asynchronous PSRAM SUMMARY ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ SUPPLY VOLTAGE: 2.7 to 3.3V ACCESS TIMES: 70ns LOW STANDBY CURRENT: 100µA DEEP POWER-DOWN CURRENT: 10µA BYTE CONTROL: UB/LB PROGRAMMABLE PARTIAL ARRAY COMPATIBLE WITH STANDARD LPSRAM TRI-STATE COMMON I/O 8 WORD PAGE ACCES |
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STMicroelectronics |
128 Mbit (8Mb x16) 1.8V Supply Burst PSRAM summary ■ SUPPLY VOLTAGE – VCC = 1.7 to 1.95V core supply voltage – VCCQ = 1.7 to 1.95V for I/O buffers USER-SELECTABLE OPERATING MODES – Asynchronous Modes: Random Read, and Write, Page Read – Synchronous Modes: NOR-Flash, Full Synchronous (Burst R |
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STMicroelectronics |
64 Mbit (4M x16) 1.8V Supply 80MHz Clock Rate - Burst PSRAM SUMMARY ■ ■ ■ ■ ■ SUPPLY VOLTAGE – VCC = 1.7 to 1.95V core supply voltage – VCCQ = 1.7 to 3.3V for I/O buffers ASYNCHRONOUS MODES – Asynchronous Random Read: 70ns and 85ns access time – Asynchronous Write – Asynchronous Page Read Page Size: 16 wo |
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STMicroelectronics |
64 Mbit (4Mb x 16)/ 104MHz Clock Rate 1.8V Supply - Bare Die Burst PSRAM summary ■ Supply Voltage – VCC = 1.7 to 1.95V core supply voltage – VCCQ = 1.7 to 1.95V for I/O buffers User-selectable Operating Modes – Asynchronous Modes: Random Read, and Write, Page Read – Synchronous Modes: NOR-Flash, Full Synchronous (Burst R |
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STMicroelectronics |
Burst PSRAM – Partial Array Self Refresh (PASR) – Deep Power-Down (DPD) Mode Operating Temperature – –30°C to +85°C M69KB128AB IS ONLY AVAILABLE AS PART OF A MULTI-CHIP PACKAGE Wafer ■ ■ ■ ■ ■ July 2006 Rev 1 1/64 www.st.com 1 This is preliminary inform |
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STMicroelectronics |
Burst PSRAM – Partial Array Self-Refresh (PASR) – Deep Power-Down (DPD) Mode – Automatic Temperature-compensated SelfRefresh Operating Temperature – –30°C to +85°C ■ ■ ■ Wafer ■ ■ ■ The M69KM048AA is only available as part of a multi-chip package Product. |
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STMicroelectronics |
Burst PSRAM – Partial Array Self-Refresh (PASR) – Deep Power-Down (DPD) Mode – Automatic Temperature-compensated SelfRefresh Operating Temperature – –30°C to +85°C ■ ■ ■ Wafer ■ ■ ■ The M69KM096AA is only available as part of a multi-chip package Product. |
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STMicroelectronics |
5V supervisor ■ 5 V operating voltage ■ NVRAM supervisor for external LPSRAM ■ Chip-enable gating (STM818 only) for external LPSRAM (7 ns max prop delay) ■ RST and RST outputs ■ 200 ms (typ) trec ■ Watchdog timer - 1.6 sec (typ) ■ Automatic battery switchover ■ Lo |
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