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STMicroelectronics |
fully autoprotected Power MOSFET During normal operation, the INPUT pin is electrically connected to the gate of the internal power MOSFET through a low impedance path. The device then behaves like a standard power MOSFET and can be used as a switch from DC up to 50KHz. The only dif |
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STMicroelectronics |
N-CHANNEL MOSFET TAB Order code VDS RDS(on) max. ID PTOT STD1NK60-1 600 V 8.5 Ω 1 A 30 W IPAK 3 2 1 Figure 1: Internal schematic diagram D(2, TAB) G(1) S(3) Extremely high dv/dt capability ESD improved capability 100% avalanche tested Gate charge |
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STMicroelectronics |
N-channel Power MOSFET TYPE VDSS RDS(on) ID Pw STQ1NK80ZR-AP STN1NK80Z STD1NK80Z STD1NK80Z-1 800 V 800 V 800 V 800 V < 16 Ω < 16 Ω < 16 Ω < 16 Ω 0.3 A 0.25A 1.0 A 1.0 A 3W 2.5 W 45 W 45 W ■ TYPICAL RDS(on) = 13Ω ■ EXTREMELY HIGH dv/dt CAPABILITY ■ ESD IMPROVED CA |
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STMicroelectronics |
N-channel Power MOSFET TYPE VDSS RDS(on) ID Pw STQ1NK80ZR-AP STN1NK80Z STD1NK80Z STD1NK80Z-1 800 V 800 V 800 V 800 V < 16 Ω < 16 Ω < 16 Ω < 16 Ω 0.3 A 0.25A 1.0 A 1.0 A 3W 2.5 W 45 W 45 W ■ TYPICAL RDS(on) = 13Ω ■ EXTREMELY HIGH dv/dt CAPABILITY ■ ESD IMPROVED CA |
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STMicroelectronics |
N-CHANNEL MOSFET Order code STD1NK60T4 VDS 600 V RDS(on) max. 8.5 Ω ID PTOT 1 A 30 W Figure 1: Internal schematic diagram D(2, TAB) Extremely high dv/dt capability ESD improved capability 100% avalanche tested Gate charge minimized Applications Low pow |
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STMicroelectronics |
N-Channel Power MOSFET Order codes VDS RDS(on) max. ID STD1NK80ZT4 800 V 16 Ω 1 • 100% avalanche tested • Gate charge minimized • Very low intrinsic capacitance • Zener-protected Applications • Switching applications AM01476v1_tab Description This high-voltage |
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STMicroelectronics |
N-CHANNEL MOSFET TYPE VDSS RDS(on) ID Pw STQ1NK80ZR-AP STN1NK80Z STD1NK80Z STD1NK80Z-1 800 V 800 V 800 V 800 V < 16 Ω < 16 Ω < 16 Ω < 16 Ω 0.3 A 0.25A 1.0 A 1.0 A 3W 2.5 W 45 W 45 W ■ TYPICAL RDS(on) = 13Ω ■ EXTREMELY HIGH dv/dt CAPABILITY ■ ESD IMPROVED CA |
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STMicroelectronics |
STD1NC6 = 25°C Drain Current (continuos) at TC = 100°C Drain Current (pulsed) Total Dissipation at TC = 25°C Derating Factor Peak Diode Recovery voltage slope Storage Temperature Max. Operating Junction Temperature Value 600 600 ±30 1.4 0.9 5.6 35 0.28 3.5 |
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Desde 2024. D4U Semiconductor.
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