ST Microelectronics HC1 Hoja de datos

No.	parte #	Fabricante	Descripción
1	M74HC166	ST Microelectronics	8 BIT PISO SHIFT REGISTER M74HC166B1R M74HC166M1R T&R M74HC166RM13TR M74HC166TTR enabled and synchronous loading occurs on the next clock pulse. Clocking is accomplished on the low-to-high level edge of the clock pulse. The CLOCK-INHIBIT input should be changed to the high
2	74HC148	STMicroelectronics	8 TO 3 LINE PRIORITY ENCODER the need for external circuitry. Data inputs are active at the low logic level. All inputs are equipped with protection circuits against static discharge and transient excess voltage. INPUT AND OUTPUT EQUIVALENT CIRCUIT PIN CONNECTIONS (top view)
3	M54HC163	ST Microelectronics	SYNCHRONOUS PRESETTABLE 4-BIT COUNTER inary counters. The CLOCK input is active on the rising edge. Both LOAD and CLEAR inputs are active Low. Presetting of all four IC’s is synchronous on the rising edge of the CLOCK. The function on the M54/74HC162/163 is synchronous to CLOCK, while th
4	M74HC10	ST Microelectronics	TRIPLE 3-INPUT NAND GATE 8 7 14 SYMBOL 1A to 3A 1B to 3B 1C to 3C 1Y to 3Y GND VCC NAME AND FUNCTION Data Inputs Data Inputs Data Inputs Data Outputs Ground (0V) Positive Supply Voltage TRUTH TABLE A L X X H X : Don‘t Care B X L X H C X X L H Y H H H L ABSOLUTE MAXIMUM
5	M74HC193	ST Microelectronics	SYNCHRONOUS UP/DOWN BINARY COUNTER allows the counters to be used as divide-by-n counters by modifying the count length with the preset inputs. In addition the counter can also be cleared. This is accomplished by inputting a high on the CLEAR input. All 4 internal stages are set to lo
6	M74HC194	ST Microelectronics	4 BIT PIPO SHIFT REGISTER a system designer may want in a shift register. It features parallel inputs, parallel outputs, right shift and left shift serial inputs, clear line. The register has four distinct modes of operation : PARALLEL (broadside) LOAD ; SHIFT RIGHT (in the d
7	M74HC195	ST Microelectronics	8 BIT PIPO SHIFT REGISTER parallel inputs, parallel outputs, J-K serial inputs, a SHIFT/LOAD control input, and a direct overriding CLEAR. This shift register can operate in two modes : Parallel Load ; Shift from QA towards QD. Parallel loading is accomplished by applying the
8	M74HC162	ST Microelectronics	SYNCHRONOUS PRESETTABLE 4-BIT COUNTER inary counters. The CLOCK input is active on the rising edge. Both LOAD and CLEAR inputs are active Low. Presetting of all four IC’s is synchronous on the rising edge of the CLOCK. The function on the M54/74HC162/163 is synchronous to CLOCK, while th
9	M74HC163	ST Microelectronics	SYNCHRONOUS PRESETTABLE 4-BIT COUNTER inary counters. The CLOCK input is active on the rising edge. Both LOAD and CLEAR inputs are active Low. Presetting of all four IC’s is synchronous on the rising edge of the CLOCK. The function on the M54/74HC162/163 is synchronous to CLOCK, while th
10	M74HC165	ST Microelectronics	8-bit PISO shift register d must be high. The two clock input perform identically; one can be used as a clock inhibit by applying a high signal; to permit this operation clocking is accomplished through a 2 input nor gate. To avoid double clocking, however, the inhibit signa
11	M74HC192	STMicroelectronics	SYNCHRONOUS UP/DOWN DECADE COUNTER
12	54HC14	STMicroelectronics	Rad-hard high speed 2 to 6V CMOS logic • ESCC qualified • 7 V Absolute maximum ratings • 2 V to 6 V operating voltage for CMOS M54HCxxx series • 4.5 V to 5.5 V operating voltage for TTL M54HCTxxx series • Ceramic hermetic packages • -55 °C to +125 °C operating temperature range • Radiatio
13	M54HC147	ST Microelectronics	10 TO 4 LINE PRIORITY ENCODER priority encoding of the inputs to ensure that only the highest order data line is encoded. Nine input lines are encoded to a four line BCD output. The implied decimal zero condition requires no input condition as zero is encoded when all nine data l
14	M74HC107	ST Microelectronics	DUAL J-K FLIP FLOP rge and transient excess voltage. Obsolete ProducPIN CONNECTION AND IEC LOGIC SYMBOLS August 2001 1/11 M74HC107 INPUT AND OUTPUT EQUIVALENT CIRCUIT PIN DESCRIPTION PIN No SYMBOL NAME AND FUNCTION 1, 8, 4, 11 1J, 2J, 1K, Synchronous Inputs;
15	M74HC11	ST Microelectronics	TRIPLE 3-INPUT AND GATE 8 7 14 SYMBOL 1A to 3A 1B to 3B 1C to 3C 1Y to 3Y GND VCC NAME AND FUNCTION Data Inputs Data Inputs Data Inputs Data Outputs Ground (0V) Positive Supply Voltage TRUTH TABLE A L X X H X : Don’t Care B X L X H C X X L H Y L L L H ABSOLUTE MAXIMUM
16	M74HC113	ST Microelectronics	DUAL J-K FLIP FLOP WITH PRESET he logic level of the J and K inputs may be allowed to change when the clock pulse is HIGH and the bistable will function as shown in the truth table as long as minimum set-up times are observed. Input data is transferred to the outputs on the negati
17	M74HC14	ST Microelectronics	HEX SCHMITT INVERTER 1/8 M74HC14 INPUT AND OUTPUT EQUIVALENT CIRCUIT PIN DESCRIPTION PIN No 1, 3, 5, 9, 11, 13 2, 4, 6, 8, 10, 12 7 14 SYMBOL 1A to 6A 1Y to 6Y GND VCC NAME AND FUNCTION Data Inputs Data Outputs Ground (0V) Positive Supply Voltage TRUTH TABLE A L H Y H
18	HC193	ST Microelectronics	Synchronous Binary Up/down Counter allows the counters to be used as divide-by-n counters by modifying the count length with the preset inputs. In addition the counter can also be cleared. This is accomplished by inputting a high on the CLEAR input. All 4 internal stages are set to lo
19	54HC193	STMicroelectronics	Rad-hard high speed 2 to 6V CMOS logic • ESCC qualified • 7 V Absolute maximum ratings • 2 V to 6 V operating voltage for CMOS M54HCxxx series • 4.5 V to 5.5 V operating voltage for TTL M54HCTxxx series • Ceramic hermetic packages • -55 °C to +125 °C operating temperature range • Radiatio
20	54HC164	STMicroelectronics	Rad-hard high speed 2 to 6V CMOS logic • ESCC qualified • 7 V Absolute maximum ratings • 2 V to 6 V operating voltage for CMOS M54HCxxx series • 4.5 V to 5.5 V operating voltage for TTL M54HCTxxx series • Ceramic hermetic packages • -55 °C to +125 °C operating temperature range • Radiatio