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Renesas MPC DataSheet

No. parte # Fabricante Descripción Hoja de Datos
1
MPC9893

Renesas
3.3V 1:12 LVCMOS PLL Clock Generator

• 12-output LVCMOS PLL clock generator
• 2.5 V and 3.3 V compatible
• IDCS - on-chip intelligent dynamic clock switch
• Automatically detects clock failure
• Smooth output phase transition during clock failover switch
• 7.5
  – 200 MHz output frequency
Datasheet
2
MPC9447

Renesas
LVCMOS Clock Fanout Buffer

• 9 LVCMOS Compatible Clock Outputs
• 2 Selectable, LVCMOS Compatible Inputs
• Maximum Clock Frequency of 350 MHz
• Maximum Clock Skew of 150 ps
• Synchronous Output Stop in Logic Low State Eliminates Output Runt Pulses
• High-Impedance Output Contro
Datasheet
3
MPC940L

Renesas
LOW VOLTAGE 1:18 CLOCK DISTRIBUTION CHIP
the capability to select either a differential LVPECL or an LVCMOS compatible input. The 18 outputs are 2.5 V or 3.3 V LVCMOS compatible and feature the drive strength to drive 50  series or parallel terminated transmission lines. With output-to-out
Datasheet
4
MPC9772

Renesas
3.3V 1:12 LVCMOS PLL Clock Generator

• 1:12 PLL Based Low-Voltage Clock Generator
• 3.3 V Power Supply
• Internal Power-On Reset
• Generates Cock Signals Up to 240 MHz
• Maximum Output Skew of 250 ps
• On-Chip Crystal Oscillator Clock Reference
• Two LVCMOS PLL Reference Clock Inputs
Datasheet
5
MPC962305

Renesas
3.3V Zero Delay Buffer

• 1:5 LVCMOS zero-delay buffer (MPC962305)
• 1:9 LVCMOS zero-delay buffer (MPC962309)
• Zero input-output propagation delay
• Multiple low-skew outputs
• 250 ps max output-output skew
• 700 ps max device-device skew
• Supports a clock I/O frequency r
Datasheet
6
MPC9446

Renesas
LVCMOS Clock Fanout Buffer

• Configurable 10 outputs LVCMOS clock distribution buffer
• Compatible to single, dual and mixed 3.3 V/2.5 V voltage supply
• Wide range output clock frequency up to 250 MHz
• Designed for mid-range to high-performance telecom, networking and comput
Datasheet
7
MPC9773

Renesas
LVCMOS PLL Clock Generator

• 1:12 PLL based low-voltage clock generator
• 3.3 V power supply
• Internal power-on reset
• Generates clock signals up to 242.5 MHz
• Maximum output skew of 250 ps
• Differential PECL reference clock input
• Two LVCMOS PLL reference clock inputs
Datasheet
8
MPC9824

Renesas
Clock Generator

• 6 LVCMOS outputs for processor and other system circuitry
• 3 Buffered 25 MHz reference clock outputs
• Crystal oscillator or external reference input
• 25 MHz Input reference frequency
• Selectable output frequencies = 33.33, 50, 66.66, 100, 125,
Datasheet



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