Renesas 874 Hoja de datos

No.	parte #	Fabricante	Descripción
1	ISL95874	Renesas	PWM DC/DC Controllers • Input Voltage Range: 3.3V to 25V • Output Voltage Range: 0.5V to 5V • Precision Regulation - Proprietary R4™ Frequency Control Loop - ±0.5% System Accuracy Over -10°C to +100°C • Optimal Transient Response - Intersil’s R4™ Modulator Technology • Ou
2	ICS8741004I	Renesas	Differential-to-LVDS/0.7V Differential Jitter Attenuator • Two LVDS and two 0.7V differential output pairs Bank A has two LVDS output pairs and Bank B has two 0.7V differential output pairs • One differential clock input pair • CLK, nCLK pair can accept the following differential input levels: LVPECL, LVDS
3	874S02I	Renesas	1:1 Differential-to-LVDS Zero Delay Clock Generator • One differential LVDS output pair and one differential feedback output pair • One differential clock input pair • CLK/nCLK can accept the following differential input levels: LVPECL, LVDS, LVHSTL, SSTL • Input frequency range: 62.5MHz to 1GHz • Out
4	8741004I	Renesas	Differential-to-LVDS/0.7V Differential Jitter Attenuator • Two LVDS and two 0.7V differential output pairs Bank A has two LVDS output pairs and Bank B has two 0.7V differential output pairs • One differential clock input pair • CLK, nCLK pair can accept the following differential input levels: LVPECL, LVDS
5	8745BI-21	Renesas	1:1 Differential-to-LVDS Zero Delay Clock Generator The 8745BI-21 is a highly versatile 1:1 LVDS Clock Generator. The 8745BI-21 has a fully integrated PLL and can be configured as a zero delay buffer, multiplier or divider, and has an output frequency range of 31.25MHz to 700MHz. The Reference Divide
6	M5M5V5636UG-16	Renesas	18874368-BIT(524288-WORD BY 36-BIT) NETWORK SRAM • Fully registered inputs and outputs for pipelined operation • Fast clock speed: 167 and 133 MHz • Fast access time: 3.8 and 4.2 ns • Single 3.3V -5% and +5% power supply VDD • Separate VDDQ for 3.3V or 2.5V I/O • Single 2.5V -5% and +5% power suppl