No. | parte # | Fabricante | Descripción | Hoja de Datos |
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Panasonic |
SVGA Display Controller all the necessary interfaces for a compact display system: ISA bus interface, local bus interface, DRAM interface, and LCD panel interface. The built-in graphics acceleration functions include support for bit-block transfers (BITBLT) and hardware cur |
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Panasonic |
LCD Panel Source Driver Lower power consumption and reduced EMI emissions owing to digital 3.0 volt power supply and analog 5.0 volt power supply Broad dynamic range of 4.6 V (for power supply voltage of 5.0 V) Low discrepancies between output pins: ±20 mV (typ.) 240 output |
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Panasonic |
Liquid Crystal Display Panel Source Driver Driver capable of displaying 260,000 colors with built-in D/A converter accepting 6-bit digital inputs Choice of 300 or 309 drive outputs Seven-segment gamma correction Data settings of 01 and 3E in addition to 00, 07, 17, 27, 37, and 3F for output v |
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Panasonic |
Source Driver for LCD Panel Drive • Includes a built-in D/A converter and accepts 8-bit digital input data for 16.7-million color display. • Output dynamic range: 14.6 V P-P (when AVDD = 15 V) • Supports both dot inversion drive and source inversion drive schemes. • Number of drive o |
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Panasonic Semiconductor |
Shading Correction LSI Choice of correction range (50% or 75%) depending on extent of shading distortion Parallel A/D converter functions Resolution: 7 bits Non-linearity: ± 1/2 LSB Conversion speed: max. 5 MHz Note: This is the guaranteed design value for the chip used as |
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Panasonic Semiconductor |
CODEC LSI for Facsimile Images Compression methods MH, MR, and MMR Operating mode: Page mode Bus configuration: Choice of dual- or single-bus operation Decoding error processing: Choice of replacing with the previous line or a white line Image bus configuration: 8 bits, maximum 16 |
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Panasonic Semiconductor |
TFT LCD Gate Driver with 242 Outputs Inverts DC component of output voltage every field and line. Supports both pre- and post-gate drive methods. Incorporates bidirectional shift register. Supports output pin expansion via expansion pins. Operating voltage 4.5 to 5.5 V (Input) Maximum L |
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Panasonic |
TFT LCD Gate Driver • Adopts a bidirectional shift register system • Provides an expansion pin so that the number of output pins can be increased. • Pulse width modulation function (OE1 to OE3) • Driver operating frequency: 500 kHz (maximum) • LCD drive voltage: VEE + 4 |
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Panasonic |
LCD Driver Series ・ R - DAC ・ 6bit ( 262 k colors) ・ Data inversion control ・ Dot-inverted drive ・ R - DAC ・ 6-bit ( 262 k colors) ・ Data inversion control ・ Line-inverted drive ・ R - DAC ・ 6-bit ( 262 k colors) ・ Middle voltage ・ Dot-inverted / source-inverted drive |
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Panasonic Semiconductor |
3-Dimension Y/C Separation LSI • Input (A/D input Y: 10-bit, C/U/V: 8-bit) 0.08 SEATING PLANE Composite video signal YC signal YUV signal LQFP176-P-2424B • Analog Output (D/A output Y: 10-bit , C/U/V: 8-bit) YC signal YUV signal • Digital Output (Y: 10-bit, C/U/V: 8-bit) YC signa |
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Panasonic |
VGA-NTSC Scan Converter Conversion of PC/AT VGA (640 × 480) display data into NTSC video signal • 8-bit inputs for VGA R, G, and B signals Horizontal frequency: 31.5 kHz Vertical frequency: 59.94 Hz • Conversion of non-interlaced display to interlaced display • Built-in pha |
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Panasonic |
SVGA Display Controller all the necessary interfaces for a compact display system: ISA bus interface, local bus interface, DRAM interface, and LCD panel interface. The built-in graphics acceleration functions include support for hardware cursor. Note: IBM™ and VGA are regis |
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Panasonic Semiconductor |
CMOS LSI source driver for color TFT LCD panels (1) Power saving driver (2) Built in DA converter accepting 6-bit digital input (for 262,144 colors) (3) Choice of 360 and 324 drive outputs (4) Input data bus at pixel level (5) Choice of output data format: gray scale or binary (6) Eleven reference |
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Panasonic Semiconductor |
Channel Decoder LSI for Digital Satellite Broadcast Reception • Can be used in systems conforming to DVB, in US DIRECTV® systems, and in single carrier per channel (SCPC) communication systems. • Integrates a 2-channel A/D converter, a variable rate QPSK demodulator, and forward error correction (FEC) on a sing |
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Panasonic Semiconductor |
PCM Audio Decoder LSI for Satellite Broadcasting Tuners Built-in digital filter using 8-fold oversampling Built-in tertiary ∆-∑ noise shaping D/A converter Reduced jitter noise through use of switched capacitor configuration Built-in analog post filter Built-in digital de-emphasis circuit Choice of microc |
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Panasonic Semiconductor |
Image Processing LSI include correction of laser printer dot spreading at the pixel level, processing to enhance the compression ratio, reproduction of halftone images with 64-gradation, two-dimensional MTF correction using moire suppression, and infinite shading for all |
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Panasonic Semiconductor |
High-Speed CODEC LSI for Facsimile Images include real-time printing to laser printers, built-in line memory, enlargement and reduction, and code conversion. Function Message coding: MH, MR, MMR, and MG3. The chip also supports data transfers on the image and system buses and DMA transfers |
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Panasonic |
Full Duplex AV Controller G G G G G G G G G G G G Compliant to IEEE1394-1995 and 1394a Operates on S400/S200/S100 Integrated 2port PHY (with interface to optional external PHY) Compliant to IEC61883 1-6 (MPEG-TS/DV/Audio & Music data transfer) Hardware support of DTCP (Encry |
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Panasonic Semiconductor |
Digital RGB Processor LSI • INPUT Analog/Digital YUV signal Analog/Digital RGB signal • OUTPUT Digital RGB signal • INPUT OUTPUT (Digital each 8 bit) YUV signal • Main Function Clamp control (Clamp current source including) Black/White expansion White character improvement Ho |
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Panasonic Semiconductor |
OFDM Demodulation LSI • • • • • • Supports digital terrestrial broadcasting (ISDB-T) and Digital terrestrial sound broadcasting (ISDB-TSB) Strong suppression of co-channel interference with analog broadcasting signal AGC with 2 output signals (PWM output) On-chip CPU/IF c |
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