No. | parte # | Fabricante | Descripción | Hoja de Datos |
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PLX Technology |
PCI Express to PCI Bridge General Features o Forward and Reverse bridging o Tiny 161 ball BGA package (10mm x 10mm) o Low power – 0.3 Watts maximum o EEPROM configuration option with SPI o Internal 8Kbyte shared RAM o 1.5 V core supply voltage o JTAG o Four (4) GPIO pins |
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PLX Technology |
PCI to PCI Bridge es or systems or other critical applications. PLX Part Number: PCI 6154-BB66BC; Former HiNT Part Number: HB2 Order Number: 6154-SIL-DB-P1-2.0 Printed in the USA, May 2003 PCI 6154 PCI-to-PCI Bridge Adaptive High Performance Asynchronous 66 MHz 64-bi |
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PLX Technology |
PCI to PCI Bridge es or systems or other critical applications. PLX Part Number: PCI 6150-BB66PC; Former HiNT Part Number: HB4 Order Number: 6150-SIL-DB-P1-2.0 Printed in the USA, May 2003 PCI 6150 PCI-to-PCI Bridge High Performance Asynchronous 66MHz 32-bit PCI-to-P |
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PLX Technology |
PCI to PCI Bridge Summary. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . xvii 1. Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
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PLX Technology |
Dual Mode PCI to PCI Bridge • • • • • • • • • • • • • • • Programmable Transparent, Non-Transparent or Universal Mode operation Jumper less switching between System and Peripheral Slot applications in CPCI Programmable Primary or Secondary Port System boot up priority. Semaphor |
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PLX Technology |
PCI Bus Target Interface Chip Data Book . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.4. Pin Compatibility . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
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PLX Technology |
PCI Express to PCI Bridge ExpressLane™ PCI Express-to-PCI/PCI-X Bridge Flexible, High-Performance Bridge in a Small Package The PLX Technology ExpressLane PEX 8114 is a high performance bridge that enables designers to migrate legacy PCI and PCI-X bus interfaces to the new a |
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PLX Technology |
PCI Bus Mastering I/O Accelerator |
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PLX Technology |
32 Bit / 33 Mhz PCI Target I/O Accelerator to provide high performance and flexibility in order to simplify your design, such as four programmable GPIOs, local chip select, prefetch read ahead mode, zero wait state bursting, and on-the-fly big/little endian byte conversion. Move your ISA Desi |
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PLX Technology |
66 MHz PCI Bus Mastering I/O Accelerator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-7 1.4.1. Interfaces . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
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PLX Technology |
PCI to PCI Bridge PC99 Power Management D3 Cold Wakeup Capable* Very efficient, low power, low cost and easy to use PCI ClockRun support. Optional Zero clock latency when bursting data across PCI 6140 to preserve maximum data rate PCI compatible cycle completion witho |
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PLX Technology |
PCI to PCI Bridge Summary. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . xvii 1. Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
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PLX Technology |
PCI to PCI Bridge Summary. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . xix 1. Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
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PLX Technology |
PCI to PCI Bridge Summary. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . xxv 1. Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
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PLX Technology |
PCI Bus Target Interface Chip |
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PLX Technology |
PCI Bus Target Interface Chip |
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PLX Technology |
Next Generation 32-bit Pci Bus Mastering Interface Chip . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.2. Company and Product Background . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
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PLX Technology |
ExpressLane PCI Express to Generic Local Bus Bridge functions and operations of the PLX Technology ExpressLaneTM PEX 8311 PCI Express-to-Generic Local Bus bridge. Intended Audience This data book is intended for hardware and software engineers developing systems hardware and software for the PEX 831 |
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PLX Technology |
66MHz Pci I/o Accelerator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-8 1.4.1. Interfaces . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
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