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NXP XA- DataSheet

No. parte # Fabricante Descripción Hoja de Datos
1
MCXA153

NXP
32-bit MCU

• Arm Cortex-M33 48MHz(A14x) or 96MHz(A15x, A13x) with 381 CoreMark (3.97 CoreMark/MHz) MCXA13x MCXA14x MCXA15x
• Up to 128 KB Flash, 32 KB SRAM, up to 8 KB SRAM with ECC
• All RAM can be retained down to Deep Power Down mode
• -40 °C to 125 °C t
Datasheet
2
PXAS30KBA

NXP
XA 16-bit microcontroller 32K/1K OTP/ROM/ROMless/ 8-channel 8-bit A/D/ low voltage 2.7 V.5.5 V/ I2C/ 2 UARTs/ 16MB address range
All timers have a toggle output capability.
• Watchdog timer.
• 5-channel 16-bit Programmable Counter Array (PCA).
• I2C-bus serial I/O port with byte-oriented master and slave functions. Specific features of the XA-S3
• 2.7 V to 5.5 V operation.
Datasheet
3
XA-S3

NXP
XA 16-bit microcontroller
All timers have a toggle output capability.
• Watchdog timer.
• 5-channel 16-bit Programmable Counter Array (PCA).
• I2C-bus serial I/O port with byte-oriented master and slave functions. Specific features of the XA-S3
• 2.7 V to 5.5 V operation.
Datasheet
4
P51XAG33KBA

NXP
XA 16-bit microcontroller family 32K/512 OTP/ROM/ROMless / watchdog / 2 UARTs
OF THE XA-G3
• 20-bit address range, 1 megabyte each program and data space. (Note that the XA architecture supports up to 24 bit addresses.)
• Upward compatibility with the 80C51 architecture
• 16-bit fully static CPU with a 24-bit program and dat
Datasheet
5
MCXA152

NXP
32-bit MCU

• Arm Cortex-M33 48MHz(A14x) or 96MHz(A15x, A13x) with 381 CoreMark (3.97 CoreMark/MHz) MCXA13x MCXA14x MCXA15x
• Up to 128 KB Flash, 32 KB SRAM, up to 8 KB SRAM with ECC
• All RAM can be retained down to Deep Power Down mode
• -40 °C to 125 °C t
Datasheet
6
PXAS30

NXP
XA 16-bit microcontroller 32K/1K OTP/ROM/ROMless/ 8-channel 8-bit A/D/ low voltage 2.7 V.5.5 V/ I2C/ 2 UARTs/ 16MB address range
All timers have a toggle output capability.
• Watchdog timer.
• 5-channel 16-bit Programmable Counter Array (PCA).
• I2C-bus serial I/O port with byte-oriented master and slave functions. Specific features of the XA-S3
• 2.7 V to 5.5 V operation.
Datasheet
7
PXAS30KBBE

NXP
XA 16-bit microcontroller 32K/1K OTP/ROM/ROMless/ 8-channel 8-bit A/D/ low voltage 2.7 V.5.5 V/ I2C/ 2 UARTs/ 16MB address range
All timers have a toggle output capability.
• Watchdog timer.
• 5-channel 16-bit Programmable Counter Array (PCA).
• I2C-bus serial I/O port with byte-oriented master and slave functions. Specific features of the XA-S3
• 2.7 V to 5.5 V operation.
Datasheet
8
PXAS30KFA

NXP
XA 16-bit microcontroller 32 K/1 K OTP/ROM/ROMless/ 8-channel 8-bit A/D/ low voltage 2.7 V.5.5 V/ I2C/ 2 UARTs/ 16 MB address range
Datasheet
9
PXAS31KFBE

NXP
XA 16-bit microcontroller 32K/1K OTP/ROM/ROMless/ 8-channel 8-bit A/D/ low voltage 2.7 V.5.5 V/ I2C/ 2 UARTs/ 16MB address range
All timers have a toggle output capability.
• Watchdog timer.
• 5-channel 16-bit Programmable Counter Array (PCA).
• I2C-bus serial I/O port with byte-oriented master and slave functions. Specific features of the XA-S3
• 2.7 V to 5.5 V operation.
Datasheet
10
MCXA142

NXP
32-bit MCU

• Arm Cortex-M33 48MHz(A14x) or 96MHz(A15x, A13x) with 381 CoreMark (3.97 CoreMark/MHz) MCXA13x MCXA14x MCXA15x
• Up to 128 KB Flash, 32 KB SRAM, up to 8 KB SRAM with ECC
• All RAM can be retained down to Deep Power Down mode
• -40 °C to 125 °C t
Datasheet
11
PXAG49KFA

NXP
XA 16-bit microcontroller family 64K FLASH/2K RAM/ watchdog/ 2 UARTs
(same as XA-G3 T0, T1, and T2). All timers have a toggle output capability FEATURES
• 4.5V to 5.5V operation. For low voltage operation, consult factory.
• 64K bytes of on-chip Flash program memory with In-System Programming capability
• Watchdog
Datasheet
12
PXAH40KFBE

NXP
Single-chip 16-bit microcontroller
like DMA, memory controller and four advanced USARTs help solve I/O intensive tasks with a minimum of CPU load. The XA-H3 feature set is a subset of the XA-H4 (see Table 1). The XA-H3/H4 devices are members of the Philips XA (eXtended Architecture) f
Datasheet
13
PXAS30KBBE

NXP
XA 16-bit microcontroller 32 K/1 K OTP/ROM/ROMless/ 8-channel 8-bit A/D/ low voltage 2.7 V.5.5 V/ I2C/ 2 UARTs/ 16 MB address range
Datasheet
14
PXAS30KFA

NXP
XA 16-bit microcontroller 32K/1K OTP/ROM/ROMless/ 8-channel 8-bit A/D/ low voltage 2.7 V.5.5 V/ I2C/ 2 UARTs/ 16MB address range
All timers have a toggle output capability.
• Watchdog timer.
• 5-channel 16-bit Programmable Counter Array (PCA).
• I2C-bus serial I/O port with byte-oriented master and slave functions. Specific features of the XA-S3
• 2.7 V to 5.5 V operation.
Datasheet
15
PXAS33KFA

NXP
XA 16-bit microcontroller 32 K/1 K OTP/ROM/ROMless/ 8-channel 8-bit A/D/ low voltage 2.7 V.5.5 V/ I2C/ 2 UARTs/ 16 MB address range
All timers have a toggle output capability.
• Watchdog timer.
• 5-channel 16-bit Programmable Counter Array (PCA).
• I2C-bus serial I/O port with byte-oriented master and slave functions. Specific features of the XA-S3
• 2.7 V to 5.5 V operation.
Datasheet
16
MPXA4250A

NXP
Manifold absolute pressure sensor
Datasheet
17
MCXA143

NXP
32-bit MCU

• Arm Cortex-M33 48MHz(A14x) or 96MHz(A15x, A13x) with 381 CoreMark (3.97 CoreMark/MHz) MCXA13x MCXA14x MCXA15x
• Up to 128 KB Flash, 32 KB SRAM, up to 8 KB SRAM with ECC
• All RAM can be retained down to Deep Power Down mode
• -40 °C to 125 °C t
Datasheet
18
MCXA154

NXP
48MHz or 96MHz 32-bit MCU

• Arm Cortex-M33 48MHz(A14x) or 96MHz(A15x) with 396 CoreMark (4.12 CoreMark/MHz)
• Up to 1MB Flash, 128KB SRAM, up to 8 KB SRAM with ECC
• All RAM can be retained down to Deep Power Down mode
• -40 °C to 125 °C temperature range
• Down to 64 μA/MHz
Datasheet
19
MCXA155

NXP
48MHz or 96MHz 32-bit MCU

• Arm Cortex-M33 48MHz(A14x) or 96MHz(A15x) with 396 CoreMark (4.12 CoreMark/MHz)
• Up to 1MB Flash, 128KB SRAM, up to 8 KB SRAM with ECC
• All RAM can be retained down to Deep Power Down mode
• -40 °C to 125 °C temperature range
• Down to 64 μA/MHz
Datasheet
20
XA-G3

NXP
XA 16-bit microcontroller
OF THE XA-G3
• 20-bit address range, 1 megabyte each program and data space. (Note that the XA architecture supports up to 24 bit addresses.)
• Upward compatibility with the 80C51 architecture
• 16-bit fully static CPU with a 24-bit program and dat
Datasheet



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