NXP SCC Hoja de datos

No.	parte #	Fabricante	Descripción
1	SCN26562	NXP	Dual universal serial communications controller DUSCC FEATURES General Features transmitter • Dual full-duplex synchronous/asynchronous receiver and • Multiprotocol operation – BOP: HDLC/ADCCP, SDLC, SDLC loop, X.25 or X.75 link level, etc. – COP: BISYNC, DDCMP – ASYNC: 5 –8 bits plus optional parity
2	SCC66470	NXP	Video and System Controller
3	SCC2681	NXP	Dual asynchronous receiver/transmitter • Dual full-duplex asynchronous receiver/transmitter • Quadruple buffered receiver data registers • Programmable data format – 5 to 8 data bits plus parity – Odd, even, no parity or force parity – 1, 1.5 or 2 stop bits programmable in 1/16-bit incre
4	SC26C562	NXP	CMOS dual universal serial communications controller CDUSCC General Features transmitter • Modem controls – RTS, CTS, DCD, and up to four general purpose I/O pins per channel – CTS and DCD programmable auto-enables for Tx and Rx – Programmable interrupt on change of CTS or DCD • Dual full-duplex synchronous
5	SC68C562	NXP	CMOS dual universal serial communications controller CDUSCC • Full hardware and software upward compatibility with previous NMOS device • Modem controls – RTS, CTS, DCD, and up to four general I/O pins per channel – CTS and DCD programmable auto-enables for Tx and Rx – Programmable interrupt on change of CT
6	XA-SCC	NXP	CMOS 16-bit communications microcontroller (same as XA-G3 T0, T1). Both timers have a toggle output capability. SPECIFIC FEATURES OF THE XA-SCC range, available in 100 pin LQFP package. • 3.3V to 5.5V operation to 30MHz over the industrial temperature • 4 onboard SCC’s for 2B+D plus Asynch
7	PXASCCKFBE	NXP	CMOS 16-bit communications microcontroller (same as XA-G3 T0, T1). Both timers have a toggle output capability. SPECIFIC FEATURES OF THE XA-SCC range, available in 100 pin LQFP package. • 3.3V to 5.5V operation to 30MHz over the industrial temperature • 4 onboard SCC’s for 2B+D plus Asynch
8	SCC2691	NXP	Universal asynchronous receiver/transmitter 11 12 Pin 1 2 3 4 5 6 7 8 9 10 11 12 13 14 Symbol VCC RDN RxD TxD MPO MPI NC NC A2 A1 A0 X1/CLK X2 RESET Pin 15 16 17 18 19 20 21 22 23 24 25 26 27 28 18 19 • Full-duplex asynchronous receiver/transmitter • Quadruple buffered receiver data registe
9	SCC2698B	NXP	Enhanced octal universal asynchronous receiver/transmitter Octal UART • Eight full-duplex independent asynchronous receiver/transmitters • Quadruple buffered receiver data register • Programmable data format: – 5 to 8 data bits plus parity – Odd, even, no parity or force parity – 1, 1.5 or 2 stop bits programmable in 1