No. | parte # | Fabricante | Descripción | Hoja de Datos |
---|---|---|---|---|
|
|
NXP Semiconductors |
16 mode or 68 mode bus interface are available. The SC16C852L UART provides enhanced UART functions with 128-byte FIFOs, modem control interface, DMA mode data transfer, and IrDA encoder/decoder. The DMA mode data transfer is controlled by the FIFO trigger levels and the TXRDY and R |
|
|
|
NXP |
5V / 3.3V and 2.5V UART with 64-byte FIFOs of the SC16C750B. Some of these added features are the 64-byte receive and transmit FIFOs, automatic hardware flow control. The selectable auto-flow control feature significantly reduces software overload and increases system efficiency while in FIFO mod |
|
|
|
NXP Semiconductors |
XScale VLIO bus interface are available (see Section 6.2). The SC16C852V family UART provides enhanced UART functions with 128-byte FIFOs, modem control interface, DMA mode data transfer, and IrDA encoder/decoder. On-board status registers provide the user with error indicati |
|
|
|
NXP Semiconductors |
5 V - 3.3 V and 2.5 V quad UART - 5 Mbit/s (max.) It has a Transmission Control Register (TCR) that stores receiver FIFO threshold levels to start/stop transmission during hardware and software flow control. With the FIFO Ready (FIFO Rdy) register, the software gets the status of TXRDY/RXRDY for all |
|
|
|
NXP |
Universal Asynchronous Receiver/Transmitter (UART) with 64-byte FIFO of the SC16C750. Some of these added features are the 64-byte receive and transmit FIFOs, automatic hardware flow control. The selectable auto-flow control feature significantly reduces software overload and increases system efficiency while in FIFO mode |
|
|
|
NXP |
Dual UART such as auto hardware and software flow control, automatic RS-485 support and software reset. This allows the software to reset the UART at any moment, independent of the hardware reset signal. 2. Features and benefits 2.1 General features Dual ful |
|
|
|
NXP Semiconductors |
5 V 3.3 V and 2.5 V quad UART of the SC16C554B/554DB. Some of these added features are the 16-byte receive and transmit FIFOs, four receive trigger levels. The SC16C554B/554DB also provides DMA mode data transfers through FIFO trigger levels and the TXRDY and RXRDY signals. On-bo |
|
|
|
NXP Semiconductors |
5 V - 3.3 V and 2.5 V quad UART - 5 Mbit/s (max.) of the SC16C654B/654DB. Some of these added features are the 64-byte receive and transmit FIFOs, automatic hardware or software flow control and infrared encoding/decoding. The selectable auto-flow control feature significantly reduces software overload |
|
|
|
NXP Semiconductors |
XScale VLIO bus interface are available (see Section 6.2).The SC16C850V family UART provides enhanced UART functions with 128-byte FIFOs, modem control interface and IrDA encoder/decoder. On-board status registers provide the user with error indications and operational status |
|
|
|
NXP |
Quad UART of the SC16C654/654D. Some of these added features are the 64-byte receive and transmit FIFOs, automatic hardware or software flow control and Infrared encoding/decoding. The selectable auto-flow control feature significantly reduces software overload a |
|
|
|
NXP Semiconductors |
5 V - 3.3 V and 2.5 V quad UART - 5 Mbit/s (max.) of the SC16C654B/654DB. Some of these added features are the 64-byte receive and transmit FIFOs, automatic hardware or software flow control and infrared encoding/decoding. The selectable auto-flow control feature significantly reduces software overload |
|
|
|
NXP Semiconductors |
parallel bus interface are available. The SC16C850L UART provides enhanced UART functions with 128-byte FIFOs, modem control interface, and IrDA encoder/decoder. On-board status registers provide the user with error indications and operational status. System interrupts and |
|
|
|
WeEn |
Silicon Carbide Diode and benefits • Super low capacitance and recovery charge • Highly stable switching performance • High forward surge capability IFSM • Extremely fast reverse recovery time • Superior in efficiency to Silicon Diode alternatives • Reduced losses in asso |
|
|
|
WeEn |
Silicon Carbide Diode and benefits • Highly stable switching performance • High forward surge capability IFSM • Extremely fast reverse recovery time • Superior in efficiency to Silicon Diode alternatives • Reduced losses in associated MOSFET • Reduced EMI • Reduced coolin |
|
|
|
WeEn |
Silicon Carbide Diode and benefits • Highly stable switching performance • High forward surge capability IFSM • Extremely fast reverse recovery time • Superior in efficiency to Silicon Diode alternatives • Reduced losses in associated MOSFET • Reduced EMI • Reduced coolin |
|
|
|
NXP |
Dual UART with 16 bytes of transmit and receive FIFOs and infrared (IrDA) encoder/decoder may be tailored by software to meet specific user requirements. An internal loop-back capability allows on-board diagnostics. Independent programmable baud rate generators are provided to select transmit and receive baud rates. The SC16C2550 operates |
|
|
|
NXP |
Universal Asynchronous Receiver/Transmitter (UART) with 16-byte FIFO and infrared (IrDA) encoder/decoder of the SC16C550. Some of these added features are the 16-byte receive and transmit FIFOs, automatic hardware or software flow control and Infrared encoding/decoding. The selectable auto-flow control feature significantly reduces software overload and in |
|
|
|
NXP |
Quad UART with 16-byte FIFO and infrared (IrDA) encoder/decoder of the SC16C554/554D. Some of these added features are the 16-byte receive and transmit FIFOs, automatic hardware or software flow control and Infrared encoding/decoding. The selectable auto-flow control feature significantly reduces software overload a |
|
|
|
NXP |
Quad UART with 64-byte FIFO and infrared (IrDA) encoder/decoder of the SC16C654/654D. Some of these added features are the 64-byte receive and transmit FIFOs, automatic hardware or software flow control and Infrared encoding/decoding. The selectable auto-flow control feature significantly reduces software overload a |
|
|
|
NXP |
Quad UART with 64-byte FIFO It has a transmission control register (TCR) that stores receiver FIFO threshold levels to start/stop transmission during hardware and software flow control. With the FIFO RDY register, the software gets the status of TXRDY/RXRDY for all four ports i |
|