NXP SAB Hoja de datos

No.	parte #	Fabricante	Descripción
1	SAB6456	NXP	Sensitive 1 GHz divide-by-64/divide-by-256 switchable prescaler 1 − V Vi(rms) − − 10 mV CONDITIONS pin 8 to pin 4 pin 8 pins 2 and 3 SYMBOL VCC ICC fi − 70 MIN. 4,5 TYP. 5,0 21 − − 1000 MAX. 5,5 V mA MHz UNIT June 1986 2 Philips Semiconductors Product speciﬁcation Sensitive 1 GHz divide-by-64/divide-by-256
2	74AHC259	NXP	8-bit addressable latch • ESD protection: HBM EIA/JESD22-A114-A exceeds 2000 V MM EIA/JESD22-A115-A exceeds 200 V CDM EIA/JESD22-C101 exceeds 1000 V • Balanced propagation delays • All inputs have Schmitt-trigger actions • Combines demultiplexer and 8-bit latch • Serial-to-
3	SAB6456T	NXP	Sensitive 1 GHz divide-by-64/divide-by-256 switchable prescaler 1 − V Vi(rms) − − 10 mV CONDITIONS pin 8 to pin 4 pin 8 pins 2 and 3 SYMBOL VCC ICC fi − 70 MIN. 4,5 TYP. 5,0 21 − − 1000 MAX. 5,5 V mA MHz UNIT June 1986 2 Philips Semiconductors Product speciﬁcation Sensitive 1 GHz divide-by-64/divide-by-256
4	SAB9081	NXP	Multistandard Picture-In-Picture PIP controller • Double window Picture-in-Picture (PIP) in interlaced or non-interlaced mode at 8-bit resolution • Internal 1-Mbit DRAM • Three 8-bit Analog-to-Digital Converters (ADCs) (7-bit performance) with clamp circuit for each acquisition channel • One PLL w
5	HEF4724B	NXP	8-bit addressable latch GH, the contents of the latch are stored. When operating in the addressable latch mode (E = CL = LOW), changing more than one bit of A0 to A2 could impose a transient wrong address. Therefore, this should only be done while in the memory mode (E = HI
6	74AHCT259	NXP	8-bit addressable latch • ESD protection: HBM EIA/JESD22-A114-A exceeds 2000 V MM EIA/JESD22-A115-A exceeds 200 V CDM EIA/JESD22-C101 exceeds 1000 V • Balanced propagation delays • All inputs have Schmitt-trigger actions • Combines demultiplexer and 8-bit latch • Serial-to-
7	SAB9075H	NXP	Picture-in-Picture PIP controller for NTSC Display • One or two live pictures can be displayed simultaneously • Wide range of multi-Picture-In-Picture (PIP) modes available • Six 6-bit Analog-to-Digital Converters (ADC) with clamping circuit • Enhanced vertical resolution at most modes for li
8	SAB9076H	NXP	Picture-In-Picture PIP controller Display • Twin PIP in interlaced mode at 8-bit resolution • Sub-title mode features built in • Large display fine positioning area, both channels independent • Only 2 Mbit required as external VDRAM (2 × 1 Mbit or 1 × 2 Mbit) • Four 8-bit Analogue Di
9	SAB9077H	NXP	Picture-In-Picture PIP controller Display • 50/60 Hz PIP modes possible • Twin PIP in interlaced mode at 8-bit resolution • Sub-title mode features built in • Large display fine positioning area, both channels independent • Only 2 Mbit needed as external VDRAM (2 × 1 Mbit or 1 × 2 Mb
10	SAB9079HS	NXP	Multistandard Picture-In-Picture PIP controller • Suitable for single PIP, double window and multi PIP applications • Data formats 4 : 1 : 1 (all modes) and 4 : 2 : 2 (most modes) • Sample rate of 14 MHz, 720 Y*-pixels/line • Horizontal reduction factors 1⁄1 3⁄4, 2⁄3, 1⁄2, 1⁄3, 1⁄4 and 1⁄6 • Verti
11	SAB9080	NXP	NTSC Picture-In-Picture PIP controller • Double window Picture-In-Picture (PIP) in interlaced or non-interlaced mode at 8-bit resolution • Internal 1-Mbit DRAM • Three 8-bit Analog-to-Digital Converters (ADCs) (7-bit performance) with clamp circuit for each acquisition channel • One PLL w
12	SAB9082	NXP	NTSC Picture-In-Picture PIP controller • Double window Picture-in-Picture (PIP) in interlaced or non-interlaced mode at 8-bit resolution • Internal 1-Mbit DRAM • Three 8-bit Analog-to-Digital Converters (ADCs) (7-bit performance) with clamp circuit for each acquisition channel • One PLL w
13	SAB9083	NXP	Multistandard Picture-In-Picture PIP controller • Double window Picture-In-Picture (PIP) in interlaced or non-interlaced mode at 8-bit resolution • Internal 1-Mbit DRAM • Three 8-bit Analog-to-Digital Converters (ADCs) (7-bit performance) with clamp circuit for each acquisition channel • One PLL w
14	SAB3037	NXP	Computer Interface
15	SAB3035	NXP	COMPUTER INTERFACE FOR TUNING AND CONTROL (CITAC)
16	SAB3036	NXP	COMPUTER INTERFACE FOR TUNING AND CONTROL(CITAC)