NXP PIP Hoja de datos

No.	parte #	Fabricante	Descripción
1	SAB9081	NXP	Multistandard Picture-In-Picture PIP controller • Double window Picture-in-Picture (PIP) in interlaced or non-interlaced mode at 8-bit resolution • Internal 1-Mbit DRAM • Three 8-bit Analog-to-Digital Converters (ADCs) (7-bit performance) with clamp circuit for each acquisition channel • One PLL w
2	PIP3115-B	NXP	LOGIC LEVEL TOPFET TrenchMOS output stage Current limiting Overload protection Overtemperature protection Protection latched reset by input 5 V logic compatible input level Control of output stage and supply of overload protection circuits derived from input Low operat
3	PIP3221-DC	NXP	LOGIC LEVEL TOPFET s s s s s s s s www.DataSheet4U.com Very low quiescent current Power TrenchMOS™ Overtemperature protection Over and undervoltage protection Reverse battery protection Low charge pump noise Loss of ground protection Negative load clamping s s s s s
4	MC13226V	NXP	Compliant PiP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 3 High Density, Low Component Count, Integrated IEEE 802.15.4 Solution 10 4 Memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 5 MCU Peripherals . . . . . . . . . . . .
5	SAB9075H	NXP	Picture-in-Picture PIP controller for NTSC Display • One or two live pictures can be displayed simultaneously • Wide range of multi-Picture-In-Picture (PIP) modes available • Six 6-bit Analog-to-Digital Converters (ADC) with clamping circuit • Enhanced vertical resolution at most modes for li
6	SAB9076H	NXP	Picture-In-Picture PIP controller Display • Twin PIP in interlaced mode at 8-bit resolution • Sub-title mode features built in • Large display fine positioning area, both channels independent • Only 2 Mbit required as external VDRAM (2 × 1 Mbit or 1 × 2 Mbit) • Four 8-bit Analogue Di
7	SAB9077H	NXP	Picture-In-Picture PIP controller Display • 50/60 Hz PIP modes possible • Twin PIP in interlaced mode at 8-bit resolution • Sub-title mode features built in • Large display fine positioning area, both channels independent • Only 2 Mbit needed as external VDRAM (2 × 1 Mbit or 1 × 2 Mb
8	SAB9079HS	NXP	Multistandard Picture-In-Picture PIP controller • Suitable for single PIP, double window and multi PIP applications • Data formats 4 : 1 : 1 (all modes) and 4 : 2 : 2 (most modes) • Sample rate of 14 MHz, 720 Y*-pixels/line • Horizontal reduction factors 1⁄1 3⁄4, 2⁄3, 1⁄2, 1⁄3, 1⁄4 and 1⁄6 • Verti
9	SAB9080	NXP	NTSC Picture-In-Picture PIP controller • Double window Picture-In-Picture (PIP) in interlaced or non-interlaced mode at 8-bit resolution • Internal 1-Mbit DRAM • Three 8-bit Analog-to-Digital Converters (ADCs) (7-bit performance) with clamp circuit for each acquisition channel • One PLL w
10	SAB9082	NXP	NTSC Picture-In-Picture PIP controller • Double window Picture-in-Picture (PIP) in interlaced or non-interlaced mode at 8-bit resolution • Internal 1-Mbit DRAM • Three 8-bit Analog-to-Digital Converters (ADCs) (7-bit performance) with clamp circuit for each acquisition channel • One PLL w
11	SAB9083	NXP	Multistandard Picture-In-Picture PIP controller • Double window Picture-In-Picture (PIP) in interlaced or non-interlaced mode at 8-bit resolution • Internal 1-Mbit DRAM • Three 8-bit Analog-to-Digital Converters (ADCs) (7-bit performance) with clamp circuit for each acquisition channel • One PLL w
12	PIP3102-R	NXP	LOGIC LEVEL TOPFET TrenchMOS output stage with low on-state resistance Separate input pin for higher frequency drive 5 V logic compatible input Separate supply pin for logic www.DataSheet4U.com and protection circuits with low operating current Overtemperature protecti
13	PIP3106-D	NXP	LOGIC LEVEL TOPFET TrenchMOS output stage Current limiting Overload protection Overtemperature protection Protection latched reset by input 5 V logic compatible input level Control of output stage and supply of overload protection circuits derived from input Low operat
14	PIP3107-D	NXP	LOGIC LEVEL TOPFET TrenchMOS output stage Current limiting Overload protection Overtemperature protection Protection latched reset by input 5 V logic compatible input level Control of output stage and supply of overload protection circuits derived from input Low operat
15	PIP3117-B	NXP	LOGIC LEVEL TOPFET TrenchMOS output stage Current limiting Overload protection Overtemperature protection Protection latched reset by input 5 V logic compatible input level Control of output stage and supply of overload protection circuits derived from input Low operat
16	PIP3118-B	NXP	LOGIC LEVEL TOPFET TrenchMOS output stage Current limiting Overload protection Overtemperature protection Protection latched reset by input 5 V logic compatible input level Control of output stage and supply of overload protection circuits derived from input Low operat
17	PIP3119-P	NXP	LOGIC LEVEL TOPFET TrenchMOS output stage Current limiting Overload protection Overtemperature protection Protection latched reset by input 5 V logic compatible input level Control of output stage and supply of overload protection circuits derived from input Low operat
18	PIP3201-A	NXP	LOGIC LEVEL TOPFET Vertical power TrenchMOS Low on-state resistance CMOS logic compatible Very low quiescent current Overtemperature protection Load current limiting Latched overload and short circuit protection Overvoltage and undervoltage shutdown with hysteresis On-
19	PIP3202-DC	NXP	LOGIC LEVEL TOPFET Vertical power TrenchMOS Low on-state resistance CMOS logic compatible Very low quiescent current Overtemperature protection Load current limiting Latched overload and short circuit protection Overvoltage and undervoltage shutdown with hysteresis Off
20	PIP3203-A	NXP	LOGIC LEVEL TOPFET Vertical power TrenchMOS Low on-state resistance CMOS logic compatible Very low quiescent current Overtemperature protection Load current limiting Latched overload and short circuit protection Overvoltage and undervoltage shutdown with hysteresis On-