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NXP |
80C51 8-bit microcontroller family 4K/128 OTP/ROM/ROMless low voltage 2.7V.5.5V/ low power/ high speed 33 MHz • 8051 Central Processing Unit – 4k × 8 ROM (80C51) – 128 × 8 RAM – Three 16-bit counter/timers – Boolean processor – Full static operation – Low voltage (2.7V to 5.5V@ 16MHz) operation • Memory addressing capability – 64k ROM and 64k RAM • Power |
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NXP |
80C51 8-bit microcontroller family 2K/64 OTP/ROM/ 5 channel 8-bit A/D/ PWM/ low pin count packages • Available in erasable quartz lid or One-Time Programmable plastic • 80C51 based architecture • Small package sizes – 28-pin DIP – 28-pin Shrink Small Outline Package (SSOP) – 28-pin PLCC • Wide oscillator frequency range: • Low power con |
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NXP |
80C51 8-bit microcontroller family 4K/8K/16K/32K ROM/OTP 128B/256B RAM low voltage 2.7 to 5.5 V/ low power/ high speed 30/33 MHz • 80C51 Central Processing Unit – 4 kbytes ROM/EPROM (80/87C51X2) – 8 kbytes ROM/EPROM (80/87C52X2) – 16 kbytes ROM/EPROM (80/87C54X2) – 32 kbytes ROM/EPROM (80/87C58X2) – 128 byte RAM (80/87C51X2 and 80C31X2) – 256 byte RAM (80/87C52/54X2/58X2 and |
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NXP |
80C51 8-bit microcontroller family 4K/8K/16K/32K ROM/OTP 128B/256B RAM low voltage 2.7 to 5.5 V/ low power/ high speed 30/33 MHz • 80C51 Central Processing Unit – 4 kbytes ROM/EPROM (80/87C51X2) – 8 kbytes ROM/EPROM (80/87C52X2) – 16 kbytes ROM/EPROM (80/87C54X2) – 32 kbytes ROM/EPROM (80/87C58X2) – 128 byte RAM (80/87C51X2 and 80C31X2) – 256 byte RAM (80/87C52/54X2/58X2 and |
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NXP |
80C51 8-bit microcontroller family 8K.64K/256.1K OTP/ROM/ROMless/ low voltage 2.7V.5.5V/ low power/ high speed 33 MHz • 8XC54/8XC58 • 80C51FA/8XC51FA/8XC51FB/8XC51FC • 80C51RA+/8XC51RA+/8XC51RB+/8XC51RC+/8XC51RD+ For applications requiring 4K ROM/EPROM, see the 8XC51/80C31 8-bit CMOS (low voltage, low power, and high speed) microcontroller families datasheet. All t |
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NXP |
Low-voltage microcontroller with 63-kbyte OTP program memory and 2-kbyte RAM GENERAL DESCRIPTION ORDERING INFORMATION BLOCK DIAGRAM PINNING INFORMATION Pinning Pin description FUNCTIONAL DESCRIPTION Special Function Registers I/O facilities Internal data memory OTP programming Oscillator circuitry Non-conformance LIMITING VAL |
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NXP |
Low power/ low price/ low pin count 20 pin microcontroller with 4 kB OTP 8-bit A/D/and Pulse Width Modulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ORDERING INFORMATION . . . . . . . . . . . . . . . . . . . . . . |
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NXP |
Microcontrollers for TV and video MTV DESCRIPTION APPLICATIONS ORDERING INFORMATION BLOCK DIAGRAM Part options PINNING INFORMATION Pinning Pin description DESCRIPTION OF STANDARD FUNCTIONS INPUT/OUTPUT (I/O) DESCRIPTION OF DERIVATIVE FUNCTIONS General description 6-BIT PWM DACS PWM DAC o |
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NXP |
80C51 8-bit microcontroller family 4K/8K/16K/32K ROM/OTP 128B/256B RAM low voltage 2.7 to 5.5 V/ low power/ high speed 30/33 MHz • 80C51 Central Processing Unit – 4 kbytes ROM/EPROM (80/87C51X2) – 8 kbytes ROM/EPROM (80/87C52X2) – 16 kbytes ROM/EPROM (80/87C54X2) – 32 kbytes ROM/EPROM (80/87C58X2) – 128 byte RAM (80/87C51X2 and 80C31X2) – 256 byte RAM (80/87C52/54X2/58X2 and |
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NXP |
Microcontrollers for monitors with DDC interface/ auto-sync detection and sync proc. Differences from the 80C51 core Memory GENERAL DESCRIPTION ORDERING INFORMATION BLOCK DIAGRAM PINNING INFORMATION Pinning Pin description FUNCTIONAL DESCRIPTION General MEMORY ORGANIZATION Program memory Internal data memory Additional Special Functi |
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NXP |
80C51 8-bit microcontroller family with extended memory 96 kbytes of OTP program memory and 3 kbytes of data SRAM, while the P87C51MB2 has 64 kbytes of OTP and 2 kbytes of RAM. In addition, both devices are equipped with a Programmable Counter Array (PCA), a watchdog timer that can be configured to differe |
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NXP |
80C51 8-bit microcontroller family with extended memory 96 kbytes of OTP program memory and 3 kbytes of data SRAM, while the P87C51MB2 has 64 kbytes of OTP and 2 kbytes of RAM. In addition, both devices are equipped with a Programmable Counter Array (PCA), a watchdog timer that can be configured to differe |
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NXP |
80C51 8-bit microcontroller • 80C51 Central Processing Unit – 4 kbytes ROM/EPROM (P80/P87C51X2) – 8 kbytes ROM/EPROM (P80/P87C52X2) – 16 kbytes ROM/EPROM (P80/P87C54X2) – 32 kbytes ROM/EPROM (P80/P87C58X2) – 128 byte RAM (P80/P87C51X2 and P80C31X2) – 256 byte RAM (P80/P87C52/54 |
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NXP |
80C51 8-bit microcontroller • 80C51 central processing unit • 8k × 8 EPROM expandable externally to 64k bytes • An additional 16-bit timer/counter coupled to four capture registers and three compare registers • Two standard 16-bit timer/counters • 256 × 8 RAM, expandable extern |
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NXP |
Single-chip 8-bit microcontroller 1.1 80C51 Related Features of the 8xC591 1.2 CAN Related Features of the 8xC591 2 GENERAL DESCRIPTION 3 ORDERING INFORMATION 4 BLOCK DIAGRAM 5 FUNCTIONAL DIAGRAM 6 PINNING INFORMATION 6.1 Pinning diagram 6.2 Pin description 7 MEMORY ORGANIZAT |
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NXP |
Microcontrollers for NTSC TVs with On-Screen Display OSD and Closed Caption CC GENERAL DESCRIPTION ORDERING INFORMATION BLOCK DIAGRAM PINNING INFORMATION MEMORY ORGANIZATION I/O FACILITY WATCHDOG TIMER (T3) REDUCED POWER MODES I2C-BUS SERIAL I/O INTERRUPT SYSTEM OSCILLATOR CIRCUITRY RESET PIN FUNCTION SELECTION 7-BIT PWM DAC AF |
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NXP |
microcontroller . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ORDERING INFORMATION . . . . . . . . . . . . . . . . . . . . . . |
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NXP |
TrenchMOS transistor Standard level FET very low on-state resistance and has integral zener diodes giving ESD protection up to 2kV. It is intended for use in DC-DC converters and general purpose switching applications. PHP87N03T QUICK REFERENCE DATA SYMBOL VDS ID Ptot Tj RDS(ON) PARAMETE |
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NXP |
microcontroller • An accelerated 80C51 CPU provides instruction cycle times of 300 –600 ns for all instructions except multiply and divide when executing at 20 MHz. Execution at up to 20 MHz when VDD = 4.5 V to 6.0 V, 10 MHz when VDD = 2.7 V to 6.0 V. • Selectable |
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NXP Semiconductors |
PHP87N03LT • ’Trench’ technology • Very low on-state resistance • Fast switching • Low thermal resistance www.DataSheet4U.com • Logic level compatible PHP87N03LT, PHB87N03LT PHD87N03LT QUICK REFERENCE DATA d SYMBOL VDSS = 25 V ID = 75 A RDS(ON) ≤ 9.5 mΩ (VGS |
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Desde 2024. D4U Semiconductor.
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