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NXP |
N-Channel MOSFET s TrenchMOS™ technology s Fast switching s Low on-state resistance s Logic level compatible s Surface mount package. 3. Applications s Motor and actuator driver c c s Battery management s High speed, low resistance switch. 4. Pinning information |
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NXP |
N-channel enhancement mode vertical D-MOS transistor • Direct interface to C-MOS, TTL, etc. • High-speed switching. • No secondary breakdown. PINNING - SOT223 1 = gate 2 = drain 3 = source 4 = drain Marking code BSP126 QUICK REFERENCE DATA Drain-source voltage Drain current (DC) Total power dissipation |
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NXP |
P-channel enhancement mode vertical D-MOS transistor • High speed switching • No secondary breakdown • Very low on-state resistance. APPLICATIONS • Motor and actuator drivers • Power management • Synchronized rectification. handbook, halfpage BSP090 PINNING - SOT223 PIN 1 2 3 4 SYMBOL g d s d gate dr |
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NXP |
N-channel enhancement mode vertical D-MOS transistor • Direct interface to C-MOS, TTL, etc. • High-speed switching • No secondary breakdown. DESCRIPTION N-channel enhancement mode vertical D-MOS transistor in a SOT223 envelope and intended for use as a line current interruptor in telephone sets and for |
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NXP |
P-channel enhancement mode vertical D-MOS transistor • Very low RDS(on) • Direct interface to C-MOS, TTL, etc. • High-speed switching • No secondary breakdown PINNING - SOT223 1 = gate 2 = drain 3 = source 4 = drain Marking code BSP206 PIN CONFIGURATION QUICK REFERENCE DATA Drain-source voltage Drain c |
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NXP |
Battery cell controller • 9.6 V ≤ VPWR ≤ 63 V operation, 75 V transient • 7 to 14 cells management • Isolated 2.0 Mbps differential communication or 4.0 Mbps SPI • Addressable on initialization • 0.8 mV maximum total voltage measurement error • Synchronized cell voltage/cur |
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NXP |
N-channel enhancement mode TrenchMOS transistor • ’Trench’ technology • Low on-state resistance • Fast switching • High thermal cycling performance • Low thermal resistance BSP100 SYMBOL d QUICK REFERENCE DATA VDSS = 30 V ID = 6 A g RDS(ON) ≤ 100 mΩ (VGS = 10 V) RDS(ON) ≤ 200 mΩ (VGS = 4.5 V) |
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NXP |
N-channel enhancement mode vertical D-MOS transistor • Direct interface to C-MOS, TTL, etc. • High-speed switching • No secondary breakdown PINNING - SOT223 1 2 3 4 = gate = drain = source = drain ID = 500 mA; VGS = 10 V Transfer admittance ID = 500 mA; VDS = 15 V Yfs RDS(on) QUICK REFERENCE DATA D |
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NXP |
N-channel enhancement mode vertical D-MOS transistor • Direct interface to C-MOS, TTL, etc. • High-speed switching • No secondary breakdown PINNING - SOT223 1 = gate 2 = drain 3 = source 4 = drain MARKING CODE BSP110 PIN CONFIGURATION QUICK REFERENCE DATA Drain-source voltage Drain source voltage (non- |
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NXP |
N-channel enhancement mode vertical D-MOS transistor • Direct interface to C-MOS, TTL, etc. • High-speed switching • No secondary breakdown QUICK REFERENCE DATA Drain-source voltage Drain-current (DC) Drain-source ON-resistance ID = 250 mA; VGS = 10 V Gate threshold voltage PINNING - SOT223 1 = gate 2 |
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NXP |
N-channel enhancement mode vertical D-MOS transistor • Direct interface to C-MOS, TTL, etc. • High-speed switching • No secondary breakdown. DESCRIPTION N-channel enhancement mode vertical D-MOS transistor in a SOT223 envelope and intended for use as a line current interruptor in telephone sets and for |
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NXP |
N-channel enhancement mode vertical D-MOS transistor • Direct interface to C-MOS, TTL, etc. • High-speed switching • No secondary breakdown. DESCRIPTION N-channel enhancement mode vertical D-MOS transistor in a SOT223 envelope, intended for use as a line current interruptor in telephone sets and for ap |
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NXP |
N-channel enhancement mode vertical D-MOS transistor |
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NXP |
NPN high-voltage transistors • Low current (max. 100 mA) • High voltage (max. 350 V). APPLICATIONS • Switching and amplification • Especially used in telephony and automotive applications. DESCRIPTION handbook, halfpage BSP19; BSP20 PINNING PIN 1 2, 4 3 base collector emitter D |
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NXP |
P-channel enhancement mode vertical D-MOS transistor • Direct interface to C-MOS, TTL, etc. • High-speed switching • No secondary breakdown. DESCRIPTION P-channel enhancement mode vertical D-MOS transistor in a TO-92 variant envelope, intended for use in relay, high-speed and line transformer drivers. |
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NXP |
P-channel enhancement mode vertical D-MOS transistor • Direct interface to C-MOS, TTL, etc. • High-speed switching • No secondary breakdown. DESCRIPTION P-channel enhancement mode vertical D-MOS transistor in a TO-92 variant envelope, intended for use in relay, high-speed and line transformer drivers. |
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NXP |
P-channel enhancement mode vertical D-MOS transistor • Low RDS(on) • Direct interface to C-MOS, TTL, etc. • High-speed switching • No secondary breakdown. DESCRIPTION P-channel enhancement mode vertical D-MOS transistor in a miniature SOT223 envelope and intended for use in relay, high-speed and line t |
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NXP |
P-channel enhancement mode vertical D-MOS transistor • Low RDS(on) • Direct interface to C-MOS, TTL, etc. • High-speed switching • No secondary breakdown. DESCRIPTION P-channel enhancement mode vertical D-MOS transistor in a miniature SOT223 envelope, intended for use in relay, high-speed and line tran |
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NXP |
P-channel enhancement mode vertical D-MOS transistor • Direct interface to C-MOS, TTL, etc. • High-speed switching • No secondary breakdown. APPLICATIONS • Line current interruptor in telephone sets • Relay, high speed and line transformer drivers. DESCRIPTION P-channel enhancement mode vertical D-MOS |
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NXP |
P-channel enhancement mode vertical D-MOS transistor • High-speed switching • No secondary breakdown • Very low on-resistance. APPLICATIONS • Low-loss motor and actuator drivers • Power switching. DESCRIPTION handbook, halfpage BSP250 PINNING - SOT223 PIN 1 2 3 4 SYMBOL g d s d DESCRIPTION gate drain |
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Desde 2024. D4U Semiconductor.
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