No. | parte # | Fabricante | Descripción | Hoja de Datos |
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NXP |
26 W BTL and 2 x 13 W SE power amplifiers • Requires very few external components • High output power • Low output offset voltage (BTL channel) • Fixed gain • Diagnostic facility (distortion, short-circuit and temperature detection) • Good ripple rejection • Mode select switch (operating, mu |
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NXP |
DSP-based radio tuner one-chip and benefits Alignment free digital receiver including tuner and software-defined radio processing Command based high-level user interface combining high control flexibility with ease of control Read information with device and tuning status, r |
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NXP |
Stand-alone OSD for monitor applications Interface with microcontroller • 3-wire high speed (maximum 2.5 Mbits/s) serial interface with three types of transmission sequence. On-Screen Display (OSD) • On-chip PLL oscillator to generate the OSD dot clock frequency which is 384 × horizontal sy |
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NXP |
256 x 8-bit CMOS EEPROMs s Low power CMOS: x 2.0 mA maximum operating current x maximum standby current 10 µA (at 6.0 V), typical 4 µA s Non-volatile storage of 2 kbits organized as 256 × 8-bit s Single supply with full operation down to 2.5 V s On-chip voltage multiplier s |
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NXP |
Real-time clock and calendar and benefits Provides year, month, day, weekday, hours, minutes, and seconds based on a 32.768 kHz quartz crystal Century flag Clock operating voltage: 1.8 V to 5.5 V Low backup current; typical 0.25 μA at VDD = 3.0 V and Tamb = 25 °C 400 k |
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NXP |
TDA8510J • Requires very few external components • High output power • Low output offset voltage (BTL channel) • Fixed gain • Diagnostic facility (distortion, short-circuit and temperature detection) • Good ripple rejection • Mode select switch (operating, mu |
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NXP |
Stand-alone OSD GENERAL DESCRIPTION ORDERING INFORMATION BLOCK DIAGRAM PINNING INFORMATION Pinning Pin description SERIAL I/O I2C-bus serial interface High-speed serial interface (HIO) CHARACTER FONTS Character font address map Character font ROM DISPLAY RAM ORGANIZ |
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NXP |
CMOS single-chip 8-bit microcontroller • 80C51 based architecture – 4k × 8 ROM – 128 × 8 RAM – Two 16-bit counter/timers – Full duplex serial channel – Boolean processor • Non-volatile 256 × 8-bit EEPROM (electrically erasable programmable read only memory) – On-chip voltage multiplier |
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NXP |
32 x 4 automotive LCD driver and benefits AEC-Q100 compliant for automotive applications Single chip LCD controller and driver Selectable backplane drive configuration: static, 2, 3, or 4 backplane multiplexing Selectable display bias configuration: static, 1⁄2, or 1⁄3 |
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NXP |
4 x 13 W single-ended power amplifiers • Requires very few external components • High output power • Fixed gain • Diagnostic facility (distortion, short-circuit and temperature detection) • Good ripple rejection • Mode select switch (operating, mute and standby) • AC and DC short-circuit |
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NXP |
26 W BTL and 2 x 13 W SE or 4 x 13 W SE power amplifier APPLICATIONS GENERAL DESCRIPTION QUICK REFERENCE DATA ORDERING INFORMATION BLOCK DIAGRAM PINNING FUNCTIONAL DESCRIPTION Mode select switch Mode select Built-in protection circuits Short-circuit protection LIMITING VALUES HANDLING THERMAL CHARACTERIST |
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NXP |
CMOS single-chip 8-bit microcontroller with on-chip EEPROM • 80C51 based architecture – 4k × 8 ROM – 128 × 8 RAM – Two 16-bit counter/timers – Full duplex serial channel – Boolean processor • Non-volatile 256 × 8-bit EEPROM (electrically erasable programmable read only memory) – On-chip voltage multiplier |
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NXP |
4 x 40 LCD segment driver and benefits Single chip LCD controller and driver Selectable backplane drive configuration: static, 2, 3, or 4 backplane multiplexing Selectable display bias configuration: static, 1⁄2, or 1⁄3 Internal LCD bias generation with voltage-follow |
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NXP |
(ASC8848 - ASC8851) Multimedia SoC and benefits 2.1 High Quality Media NXPs expertise on multimedia processing and compression provides the state-of-the-art audio visual quality for entertainment and professional applications. The software based video encoding system guarantees perfec |
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NXP |
Universal LCD Driver and benefits AEC-Q100 compliant for automotive applications Single chip LCD controller and driver Selectable backplane drive configuration: static, 2, 3, or 4 backplane multiplexing Selectable display bias configuration: static, 1⁄2, or 1⁄3 |
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NXP Semiconductors |
Universal LCD driver and benefits Single-chip LCD controller and driver Selectable backplane drive configuration: static or 2, 3, or 4 backplane multiplexing Selectable display bias configuration: static, 1⁄2, or 1⁄3 Selectable frame frequency: 82 Hz or 110 Hz |
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NXP |
Universal LCD segment driver and benefits Single-chip LCD controller and driver Selectable backplane drive configurations: static, 2, 3, or 4 backplane multiplexing 60 segment outputs allowing to drive: 30 7-segment alphanumeric characters 15 14-segment alphanumeric ch |
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NXP |
Stand-alone OSD GENERAL DESCRIPTION ORDERING INFORMATION BLOCK DIAGRAM PINNING INFORMATION Pinning Pin description SERIAL I/O I2C-bus serial interface High-speed serial interface (HIO) CHARACTER FONTS Character font address map Character font ROM DISPLAY RAM ORGANIZ |
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NXP |
Stand-alone OSD GENERAL DESCRIPTION ORDERING INFORMATION BLOCK DIAGRAM PINNING INFORMATION Pinning Pin description SERIAL I/O I2C-bus serial interface High-speed serial interface (HIO) CHARACTER FONTS Character font address map Character font ROM DISPLAY RAM ORGANIZ |
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NXP |
I2C-bus controlled economic BTSC stereo decoder • Voltage Controlled Amplifier (VCA) noise reduction circuit • Stereo or mono selectable at the AF outputs • Stereo pilot PLL circuit with ceramic resonator • Automatic pilot cancellation • Automatic Volume Level (AVL) control (+6 to −15 dB) • I2C-bu |
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