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NXP |
Octal buffer/line driver • 5 V tolerant inputs/outputs for interfacing with 5 V logic • Wide supply voltage range of 1.2 to 3.6 V • CMOS low power consumption • Direct interface with TTL levels • Integrated 30 Ω termination resistors. DESCRIPTION 74LVC2244A The 74LVC2244A |
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NXP |
Quad buffer/line driver and benefits 5 V tolerant inputs/outputs for interfacing with 5 V logic Wide supply voltage range from 1.2 V to 3.6 V CMOS low power consumption Direct interface with TTL levels Complies with JEDEC standard: JESD8-7A (1.65 V to 1.95 V) |
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NXP Semiconductors |
Dual inverting buffer/line driver I I I I Wide supply voltage range from 1.65 V to 5.5 V 5 V tolerant input/output for interfacing with 5 V logic High noise immunity Complies with JEDEC standard: N JESD8-7 (1.65 V to 1.95 V) N JESD8-5 (2.3 V to 2.7 V) N JESD8-B/JESD36 (2.7 V to 3.6 V |
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NXP |
Single Schmitt-trigger inverter and benefits Wide supply voltage range from 1.65 V to 5.5 V High noise immunity Complies with JEDEC standard: JESD8-7 (1.65 V to 1.95 V) JESD8-5 (2.3 V to 2.7 V) JESD8-B/JESD36 (2.7 V to 3.6 V). 24 mA output drive (VCC = 3.0 V) CMOS |
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NXP |
Octal buffer/line driver allow the use of these devices as translators in mixed 3.3 V or 5 V applications. The 74LVC240A is functionally identical to the 74LVC244A except that the 244 has non-inverting outputs. 2. Features and benefits 5 V tolerant inputs for interlacing w |
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NXP |
16-bit D-type transparent latch PIN CONFIGURATION 1OE 1Q0 1Q1 GND 1Q2 1Q3 VCC 1Q4 1Q5 1 2 3 4 5 6 7 8 9 74LVC16373A/ 74LVCH16373A • 5 volt tolerant inputs/outputs for interfacing with 5V logic • Wide supply voltage range of 1.2V to 3.6V • Complies with JEDEC standard no. 8-1A • C |
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NXP |
Octal transceiver • 5 V tolerant inputs/outputs for interfacing with 5 V logic • Wide supply voltage range of 1.2 to 3.6 V • CMOS low power consumption • Direct interface with TTL levels • Integrated 30 Ω termination resistors DESCRIPTION 74LVC2245A The 74LVC2245A i |
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NXP |
Octal bus transceiver an output enable (OE) input for easy cascading and a send/receive (DIR) input for direction control. OE controls the outputs so that the buses are effectively isolated. Inputs can be driven from either 3.3 V or 5 V devices. When disabled, up to 5.5 V |
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NXP |
Low-power configurable multiple function gate s s s s Wide supply voltage range from 1.65 V to 5.5 V 5 V tolerant input/output for interfacing with 5 V logic High noise immunity Complies with JEDEC standard: x JESD8-7 (1.65 V to 1.95 V) x JESD8-5 (2.3 V to 2.7 V) x JESD8B/JESD36 (2.7 V to 3.6 V) |
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NXP |
Dual bus buffer/line driver and benefits Wide supply voltage range from 1.65 V to 5.5 V 5 V tolerant input/output for interfacing with 5 V logic High noise immunity Complies with JEDEC standard: JESD8-7 (1.65 V to 1.95 V) JESD8-5 (2.3 V to 2.7 V) JESD8-B/JESD36 (2 |
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NXP |
Quad 2-input exclusive OR gate • Wide supply range of 1.2V to 3.6V • Complies with JEDEC standard no. 8-1A • Inputs accept voltages up to 5.5V • CMOS low power consumption • Direct interface with TTL levels • 5-volt tolerant inputs, for interfacing with 5-volt logic QUICK REFEREN |
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NXP |
16-bit buffer/line driver • 5 volt tolerant inputs/outputs for interfacing with 5V logic • Wide supply voltage range of 1.2 V to 3.6 V • Drive capability ±24mA @ 3.3V • Complies with JEDEC standard no. 8-1A • CMOS low power consumption • MULTIBYTETM flow-through standard pin |
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NXP Semiconductors |
2-input EXCLUSIVE-OR gate allow the use of these devices in a mixed 3.3 V and 5 V environment. This device is fully specified for partial Power-down applications using IOFF. The IOFF circuitry disables the output, preventing the damaging backflow current through the device when |
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NXP |
Octal D-type transparent latch allow the use of these devices as translators in mixed 3.3 V and 5 V applications. The 74LVC373A is functionally identical to the 74LVC573A, but has a different pin arrangement. 2. Features and benefits 5 V tolerant inputs/outputs for interfacing w |
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NXP |
Octal buffer/line driver allow the use of these devices as translators in mixed 3.3 V and 5 V applications. 2. Features and benefits 5 V tolerant inputs for interlacing with 5 V logic Wide supply voltage range from 1.2 V to 3.6 V CMOS low power consumption Direct int |
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NXP |
Octal D-type registered transceiver • 5-volt tolerant inputs/outputs, for interfacing with 5-volt logic • Supply voltage range of 1.2V to 3.6V • Complies with JEDEC standard no. 8 –1A • CMOS low power consumption • Direct interface with TTL levels • 8-bit octal transceiver with D-type |
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NXP |
32-bit transparent D-type latch • 5 V tolerant inputs/outputs for interfacing with 5 V logic • Wide supply voltage range from 1.2 to 3.6 V • CMOS low power consumption • MULTIBYTE™ flow-trough standard pin-out architecture • Low inductance multiple power and ground pins for minimum |
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NXP |
3.3V Quad buffer four output enable inputs (1OE, 2OE, 3OE and 4OE), each controlling one of the 3-state outputs. 2 Features and benefits • Quad bus interface • 3-state buffers • Output capability: +64 mA and -32 mA • TTL input and output switching levels • Input and |
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NXP Semiconductors |
2-channel analog multiplexer/demultiplexer and benefits • Wide supply voltage range from 1.65 V to 5.5 V • Very low ON resistance: – 7.5 Ω (typical) at VCC = 2.7 V – 6.5 Ω (typical) at VCC = 3.3 V – 6 Ω (typical) at VCC = 5 V • Switch current capability of 32 mA • Break-before-make switching |
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NXP |
Buffer • Wide supply voltage range from 1.65 to 5.5 V • High noise immunity • Complies with JEDEC standard: – JESD8-7 (1.65 to 1.95 V) – JESD8-5 (2.3 to 2.7 V) – JESD8B/JESD36 (2.7 to 3.6 V). • 24 mA output drive (VCC = 3.0 V) • CMOS low power consumption • |
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Desde 2024. D4U Semiconductor.
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