| No. | parte # | Fabricante | Descripción | Hoja de Datos |
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Motorola |
8-Input Multiplexer allows multiplexer expansion by tying the outputs of up to 128 devices together. When the outputs of the 3-state devices are tied together, all but one device must be in the high impedance state to avoid high currents that would exceed the maximum ra |
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Motorola |
OCTAL BUFFER/LINE DRIVER e TTL Compatible Inputs MC74AC540/74ACT540 MC74AC541/74ACT541 N SUFFIX CASE 738-03 PLASTIC DW SUFFIX CASE 751D-04 PLASTIC VCC OE2 OE1 1 2 3 4 5 6 7 8 9 20 19 18 17 16 15 14 13 12 11 VCC OE2 OE1 1 2 3 4 5 6 7 8 9 20 19 18 17 16 15 14 13 12 11 |
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Motorola Inc |
QUAD 2-INPUT NAND GATE 10 11 12 13 1B 1A NC VCC 4B 4A NC 4Y NC 3B NC – No internal connection A logic symbol† 1A 1B 2A 2B 3A 3B 4A 4B 1 2 4 5 9 10 12 13 11 4Y 8 3Y 6 2Y logic diagram (positive logic) & 3 1Y Y B † This symbol is in accordance with ANSI/IEEE Std 91-198 |
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Motorola |
Dual 4-Input Multiplexer |
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Motorola |
OCTAL BIDIRECTIONAL TRANSCEIVER 7 A5 8 A6 9 A7 10 GND PIN NAMES OE T/R A0 –A7 B0 –B7 Output Enable Input Transmit/Receive Input Side A 3-State Inputs or 3-State Outputs Side B 3-State Inputs or 3-State Outputs TRUTH TABLES Inputs Outputs OE L L H T/R L H X Bus B Data to Bus A |
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Motorola |
DUAL 4-INPUT MULTIPLEXER H H L L H H S1 X L L L L H H H H I0 X L H X X X X X X Data Inputs I1 X X X L H X X X X I2 X X X X X L H X X I3 X X X X X X X L H Output Enable OE H L L L L L L L L Outputs Z Z L H L H L H L H OEa I0a I1a I2a I3a I0b I1b I2b I3b OEb S0 S1 Za Zb LOGI |
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Motorola |
OCTAL D-TYPE FLIP-FLOP nputs Clock Pulse Input 3-State Output Enable Input 3-State Outputs CP OE D0 D1 D2 D3 D4 D5 D6 D7 O0 O1 O2 O3 O4 O5 O6 O7 TRUTH TABLE Inputs Dn H L X CP OE L L H Outputs On H L Z X H = HIGH Voltage Level L = LOW Voltage Level X = Immaterial Z = |
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Motorola |
Octal 3-State Non-Inverting D Flip-Flop stic of CMOS Devices • In Compliance with the Requirements Defined by JEDEC Standard No. 7A • Chip Complexity: 266 FETs or 66.5 Equivalent Gates LOGIC DIAGRAM DATA INPUTS D0 3 D1 4 D2 7 D3 8 D4 13 D5 14 D6 17 D7 18 CLOCK 11 2 Q0 5 Q1 6 Q2 9 Q3 1 |
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Motorola |
Quad D Flip-Flop |
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Motorola |
(MC74AC399) Quad 2 Port Register |
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Motorola |
Octal 3-State Noninverting D Flip-Flop with the Requirements Defined by JEDEC Standard No. 7A • Chip Complexity: 266 FETs or 66.5 Equivalent Gates MC54/74HC574A J SUFFIX CERAMIC PACKAGE CASE 732 –03 1 20 20 1 N SUFFIX PLASTIC PACKAGE CASE 738 –03 20 1 DW SUFFIX SOIC PACKAGE CASE 751D |
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Motorola |
Octal 3-State Non-Inverting D Flip-Flop eristic of CMOS Devices In Compliance with the Requirements Defined by JEDEC Standard No. 7A • Chip Complexity: 266 FETs or 66.5 Equivalent Gates MC54/74HC374A J SUFFIX CERAMIC PACKAGE CASE 732 –03 1 20 20 1 N SUFFIX PLASTIC PACKAGE CASE 738 –03 2 |
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Motorola |
OCTAL BUFFER/LINE DRIVER 4 MC74ACT244 MAXIMUM RATINGS* Symbol VCC Vin Vout Iin Iout ICC Tstg Parameter DC Supply Voltage (Referenced to GND) DC Input Voltage (Referenced to GND) DC Output Voltage (Referenced to GND) DC Input Current, per Pin DC Output Sink/Source Current, pe |
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Motorola |
OCTAL BUFFER/LINE DRIVER C241 MC74ACT241 MAXIMUM RATINGS* Symbol VCC Vin Vout Iin Iout ICC Tstg Parameter DC Supply Voltage (Referenced to GND) DC Input Voltage (Referenced to GND) DC Output Voltage (Referenced to GND) DC Input Current, per Pin DC Output Sink/Source Current, |
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Motorola |
QUAD 2-INPUT MULTIPLEXER S 2 I0a 3 I1a 4 Za 5 I0b 6 I1b 7 Zb 8 GND TRUTH TABLE Output Enable OE H L L L L H = HIGH Voltage Level L = LOW Voltage Level X = Immaterial Z = High Impedance LOGIC SYMBOL Select Input S X H H L L Data Inputs I0 X X X L H I1 X L H X X Outp |
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Motorola |
DUAL 4-INPUT MULTIPLEXER ABLE Select Inputs S0 X L L H H L L H H S1 X L L L L H H H H I0 X L H X X X X X X Data Inputs I1 X X X L H X X X X I2 X X X X X L H X X I3 X X X X X X X L H Output Enable OE H L L L L L L L L Outputs Z Z H L H L H L H L OEa I0a I1a I2a I3a I0b I1b I2 |
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Motorola |
OCTAL TRANSPARENT LATCH 7 LE OE O0 –O7 Data Inputs Latch Enable Input Output Enable Input Complementary 3-State Outputs 3 LOGIC SYMBOL 4 7 8 13 14 17 18 11 1 D0 D1 D2 D3 D4 D5 D6 D7 LE OE O0 O1 O2 O3 O4 O5 O6 O7 2 5 6 9 12 15 16 19 VCC = Pin 20 GND = Pin 10 FACT DAT |
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Motorola |
OCTAL D-TYPE FLIP-FLOP 6 19 FACT DATA DataSheet 4 U .com 5-1 www.DataSheet4U.com MC74AC534 MC74ACT534 FUNCTIONAL DESCRIPTION The MC74AC534/74ACT534 consists of eight edge-triggered flip-flops with individual D-type inputs and 3-state true outputs. The buffered clock a |
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Motorola |
OCTAL D-TYPE FLIP-FLOP E O0 –O7 Data Inputs Clock Pulse Input 3-State Output Enable Input 3-State Outputs D0 D1 D2 D3 D4 D5 D6 D7 CP OE O0 O1 O2 O3 O4 O5 O6 O7 FACT DATA DataSheet 4 U .com 5-1 www.DataSheet4U.com MC74AC57 MC74ACT574 FUNCTIONAL DESCRIPTION The MC74AC574 |
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Motorola |
OCTAL D-TYPE LATCH LE OE O0 O1 O2 O3 O4 O5 O6 O7 Outputs Dn H L X X On H H O0 Z TRUTH TABLE Inputs OE L L L H LE H H L X H = HIGH Voltage Level L = LOW Voltage Level Z = High Impedance X = Immaterial O0 = Previous O0 before LOW-to-HIGH Transition of Clock FACT DATA |
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Desde 2024. D4U Semiconductor.
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