No. | parte # | Fabricante | Descripción | Hoja de Datos |
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Micross Components |
512K x 16 HIGH SPEED ASYNCHRONOUS CMOS STATIC RAM • High-speed access time: 10, 15 & 20ns • Available in Mil-Temp*, Enhanced & Industrial Ranges • High-performance, low-power CMOS process • Multiple center power and ground pins for greater noise immunity • Easy memory expansion with CE\ and OE\ oper |
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Micross |
Synchronous SRAM Synchronous Operation in relation to the input Clock 2 Stage Registers resulting in Pipeline operation On chip address counter for Burst operations Self-Timed Write Cycles On-Chip Address and Control Registers Byte Write support |
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Micross |
128K x 8 EEPROM z High speed: 250ns and 300ns z Data Retention: 10 Years z Low power dissipation, active current (20mW/MHz (TYP)), standby current (100μW(MAX)) z Single +3.3V +.3V power supply z Data Polling and Ready/Busy Signals z Erase/Write Endurance (10,000 cyc |
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Micross |
512K x 8 SRAM |
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Micross |
Synchronous SRAM Synchronous Operation in relation to the input Clock 2 Stage Registers resulting in Pipeline operation On chip address counter (base +3) for Burst operations Self-Timed Write Cycles On-Chip Address and Control Registers Byte Write s |
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Micross Components |
Synchronous SRAM • Synchronous Operation in relation to the input Clock • 2 Stage Registers resulting in Pipeline operation • On chip address counter (base +3) for Burst operations • Self-Timed Write Cycles • On-Chip Address and Control Registers • Byte Write support |
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Micross Components |
256K x 16 HIGH SPEED ASYNCHRONOUS CMOS STATIC RAM • High-speed access time: 10, 15 & 20ns • Available in Mil-Temp*, Enhanced & Industrial Ranges • Low Active Power: 85 mW (typical) • Low Standby Power: 7 mW (typical) CMOS standby • Single power supply: VDD = 3.3V ± 5% • Fully static operation: no cl |
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Micross Components |
DAC • +2.7V to +3.3V Single-Supply Operation • Wide Spurious-Free Dynamic Range: 70dB at • FfOuUllTy=D2i.f2feMreHnztial Output • Low-Current Standby or Full Shutdown Modes • Internal +1.2V, Low-Noise Bandgap Reference • Small 24-Pin Flat-pack Package OP |
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Micross |
128K x 8 EEPROM z High speed: 150, 200, and 250ns z Data Retention: 10 Years z Low power dissipation, active current (20mW/MHz (TYP)), standby current (100μW(MAX)) z Single +5V (+10%) power supply z Data Polling and Ready/Busy Signals z Erase/Write Endurance (10,000 |
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Micross |
32K x 8 SRAM • Access Times: 12, 15, 20, 25, 35, 45, 55, 70, & 100ns • Battery Backup: 2V data retention • Low power standby • High-performance, low-power CMOS double-metal process • Single +5V (+10%) Power Supply • Easy memory expansion with CE\ • All inputs and |
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Micross |
512K x 8 SRAM • High Speed: 12, 15, 17, 20, 25, 35 and 45ns • High-performance, low power military grade device • Single +5V ±10% power supply • Easy memory expansion with CE\ and OE\ options • All inputs and outputs are TTL-compatible • Ease of upgradability from |
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Micross |
512K x 8 SRAM • Ultra Low Power with 2V Data Retention (0.2mW MAX worst case Power-down standby) • Fully Static, No Clocks • Single +5V ±10% power supply • Easy memory expansion with CE\ and OE\ options • All inputs and outputs are TTL-compatible • Three state out |
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Micross |
128K x 8 SRAM • High-speed access times of 10, 12, 15 and 20 ns • High-performance, low-power CMOS process • Multiple center power and ground pins for greater noise immunity • Easy memory expansion with CE\ and OE\ options • CE\ power-down • Fully static operation |
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Micross |
512K x 8 SRAM • Ultra High Speed Asynchronous Operation • Fully Static, No Clocks • Multiple center power and ground pins for improved noise immunity • Easy memory expansion with CE\ and OE\ options • All inputs and outputs are TTL-compatible • Single +3.3V Power |
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Micross |
Synchronous SRAM • Synchronous Operation in relation to the input Clock • 2 Stage Registers resulting in Pipeline operation • On chip address counter (base +3) for Burst operations • Self-Timed Write Cycles • On-Chip Address and Control Registers • Byte Write support |
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Micross |
256K x 18 SSRAM • Fast access times: 8, 10, and 15ns • Fast clock speed: 113, 100, and 66 MHz • Fast clock and OE\ access times • • SSNinOglOe Z+E3.3MVO±D5E%foprorwedeur cseudp-pployw(VerDsDt)andby • Common data inputs and data outputs • Individual BYTE WRTIE co |
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Micross |
256K x 36 SSRAM Organized 256K x 36 Fast Clock and OE\ access times Single +3.3V +0.3V/-0.165V power supply (VDD) SNOOZE MODE for reduced-power standby Common data inputs and data outputs Individual BYTE WRITE control and GLOBAL WRITE Three chip enable |
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Micross Components |
Synchronous SRAM • Synchronous Operation in relation to the input Clock • 2 Stage Registers resulting in Pipeline operation • On chip address counter (base +3) for Burst operations • Self-Timed Write Cycles • On-Chip Address and Control Registers • Byte Write support |
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Micross Components |
512K x 36 SSRAM • Pin compatible and functionally equivalent to ZBT devices. • Supports 133MHz bus operations with zero wait states -Data is transferred on every clock • Internally self-timed output buffer control to eliminate the need to use asynchronous OE\ • Regi |
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Micross Components |
512K x 36 SSRAM • Pin compatible and functionally equivalent to ZBT devices. • Supports 133MHz bus operations with zero wait states -Data is transferred on every clock • Internally self-timed output buffer control to eliminate the need to use asynchronous OE\ • Regi |
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