| No. | parte # | Fabricante | Descripción | Hoja de Datos |
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STMicroelectronics |
16 Mbit 2Mb x8 or 1Mb x16 UV EPROM and OTP EPROM a 2 line control function which accommodates the use of multiple memory connection. The two line control function allows: a. the lowest possible memory power dissipation, b. complete assurance that output bus contention will not occur. For the most |
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STMicroelectronics |
16-Kbit serial I2C bus EEPROM • Compatible with following I2C bus modes: – 400 kHz – 100 kHz • Memory array: – 16 Kbit (2 Kbyte) of EEPROM – Page size: 16 byte • Single supply voltage: – M24C16-W: 2.5 V to 5.5 V – M24C16-R: 1.8 V to 5.5 V – M24C16-F: 1.7 V to 5.5 V (full temperat |
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ST Microelectronics |
8 BIT PISO SHIFT REGISTER M74HC166B1R M74HC166M1R T&R M74HC166RM13TR M74HC166TTR enabled and synchronous loading occurs on the next clock pulse. Clocking is accomplished on the low-to-high level edge of the clock pulse. The CLOCK-INHIBIT input should be changed to the high |
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STMicroelectronics |
16K-bit Serial I2C Bus EEPROM summary ■ Two-wire I²C serial interface Supports 400kHz protocol ■ Single supply voltage: – 2.5 to 5.5V for M24Cxx-W – 1.8 to 5.5V for M24Cxx-R ■ Write Control input ■ Byte and Page Write (up to 16 Bytes) ■ Random and Sequential Read modes ■ Self-tim |
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ST Microelectronics |
SYNCHRONOUS PRESETTABLE 4-BIT COUNTER inary counters. The CLOCK input is active on the rising edge. Both LOAD and CLEAR inputs are active Low. Presetting of all four IC’s is synchronous on the rising edge of the CLOCK. The function on the M54/74HC162/163 is synchronous to CLOCK, while th |
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ST Microelectronics |
SYNCHRONOUS PRESETTABLE 4-BIT COUNTER inary counters. The CLOCK input is active on the rising edge. Both LOAD and CLEAR inputs are active Low. Presetting of all four IC’s is synchronous on the rising edge of the CLOCK. The function on the M54/74HC162/163 is synchronous to CLOCK, while th |
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ST Microelectronics |
SYNCHRONOUS PRESETTABLE 4-BIT COUNTER inary counters. The CLOCK input is active on the rising edge. Both LOAD and CLEAR inputs are active Low. Presetting of all four IC’s is synchronous on the rising edge of the CLOCK. The function on the M54/74HC162/163 is synchronous to CLOCK, while th |
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ST Microelectronics |
8-bit PISO shift register d must be high. The two clock input perform identically; one can be used as a clock inhibit by applying a high signal; to permit this operation clocking is accomplished through a 2 input nor gate. To avoid double clocking, however, the inhibit signa |
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STMicroelectronics |
Rad-hard high speed 2 to 6V CMOS logic • ESCC qualified • 7 V Absolute maximum ratings • 2 V to 6 V operating voltage for CMOS M54HCxxx series • 4.5 V to 5.5 V operating voltage for TTL M54HCTxxx series • Ceramic hermetic packages • -55 °C to +125 °C operating temperature range • Radiatio |
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STMicroelectronics |
8 BIT SIPO SHIFT REGISTER 74HC164RM13TR M74HC164TTR transition on the clock inputs shifts data one place to the right and enters into QA the logic NAND of the two data inputs (A x B), the data that existed before the rising clock edge. A low level on the clear input override |
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STMicroelectronics |
16-Kbit serial I2C bus EEPROM • Compatible with following I2C bus modes: – 400 kHz – 100 kHz • Memory array: – 16 Kbit (2 Kbyte) of EEPROM – Page size: 16 byte • Single supply voltage: – M24C16-W: 2.5 V to 5.5 V – M24C16-R: 1.8 V to 5.5 V – M24C16-F: 1.7 V to 5.5 V (full temperat |
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STMicroelectronics |
Silicon Transistor ition s V CE = -60 V V CE = -60 V I C = -100 µ A T amb = 150 o C -60 Min. Typ . Max. -100 -100 Un it nA µA V V ( BR)CBO ∗ Collector-Base Breakdown Voltage (I E = 0) V ( BR)CEO ∗ Collector-Emitter Breakdown Voltage (I B = 0) V (BR)EBO ∗ Emitter-Base |
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Silan Microelectronics |
4BIT MCU FOR REMOTE CONTROLLER * Wide operating voltage (1.8~4.0V) * Low static power consumption (<1mA) * ROM: 2K x 9 bits * Data memory: 32 x 4bits * Timer/counter: (10~15 bits) * 8-bit timer, generates various frequencies and duty carrier * 16 I/O pins, four 4-bit I/O ports (ex |
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STMicroelectronics |
Rad-hard high speed 2 to 6V CMOS logic • ESCC qualified • 7 V Absolute maximum ratings • 2 V to 6 V operating voltage for CMOS M54HCxxx series • 4.5 V to 5.5 V operating voltage for TTL M54HCTxxx series • Ceramic hermetic packages • -55 °C to +125 °C operating temperature range • Radiatio |
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STMicroelectronics |
SYNCHRONOUS PRESETTABLE 4-BIT COUNTER Parallel Enable Input (LOAD), Count Enable Input (PE) and Count Enable Carry Input (TE), determine the PIN CONNECTION AND IEC LOGIC SYMBOLS mode of operation as shown in the Truth Table. A LOW signal on CLEAR overrides counting and parallel loading |
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ST Microelectronics |
SYNCHRONOUS PRESETTABLE 4-BIT COUNTER inary counters. The CLOCK input is active on the rising edge. Both LOAD and CLEAR inputs are active Low. Presetting of all four IC’s is synchronous on the rising edge of the CLOCK. The function on the M54/74HC162/163 is synchronous to CLOCK, while th |
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STMicroelectronics |
16K 2K x 8 PARALLEL EEPROM page write operation. A Software Data Protection (SDP) is also possible using the standard JEDEC algorithm. Table 1. Signal Names A0 - A10 DQ0 - DQ7 W E G RB VCC VSS Address Input Data Input / Output Write Enable Chip Enable Output Enable Ready / Bus |
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Micro Electronics |
NPN Silicon Transistor |
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ST Microelectronics |
16 Kbit Serial I2C Bus EEPROM and may be driven dynamically. It must be at VIL or VIH for the Byte Write mode, VIH for Multibyte Write mode or VIL for Page Write mode. When unconnected, the MODE input is internally read as VIH (Multibyte Write mode). Write Control (WC). An hardw |
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Exel Microelectronics |
2K x 8 CMOS Electrically RPROM |
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Desde 2024. D4U Semiconductor.
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