MA-COM ETC Hoja de datos

No.	parte #	Fabricante	Descripción
1	QL4016-4PF144M	ETC	16/000 Usable PLD Gate QuickRAM ESP Combining Performance/ Density and Embedded RAM up to 16 simultaneous inputs and five outputs within a cell that can be fragmented into five independent cells. Each cell has a fanin of 29 including register and control lines (see Figure 3). WDATA RAM Module (1,152 bits) RDATA WADDR RADDR RAM
2	CD74HCT85E	Texas Instruments	High-Speed CMOS Logic 4-Bit Magnitude Comparator • Buffered inputs and outputs • Typical propagation delay: 13 ns (data to output at VCC = 5 V, CL = 15 pF, TA = 25℃) • Serial or parallel expansion without external gating • Fanout (over temperature range) – Standard outputs: 10 LSTTL loads – Bus dri
3	CD74HCT85M	Texas Instruments	High-Speed CMOS Logic 4-Bit Magnitude Comparator • Buffered inputs and outputs • Typical propagation delay: 13 ns (data to output at VCC = 5 V, CL = 15 pF, TA = 25℃) • Serial or parallel expansion without external gating • Fanout (over temperature range) – Standard outputs: 10 LSTTL loads – Bus dri
4	CD74HC85M	Texas Instruments	High-Speed CMOS Logic 4-Bit Magnitude Comparator • Buffered inputs and outputs • Typical propagation delay: 13 ns (data to output at VCC = 5 V, CL = 15 pF, TA = 25℃) • Serial or parallel expansion without external gating • Fanout (over temperature range) – Standard outputs: 10 LSTTL loads – Bus dri
5	QL4016-1PF144M	ETC	16/000 Usable PLD Gate QuickRAM ESP Combining Performance/ Density and Embedded RAM up to 16 simultaneous inputs and five outputs within a cell that can be fragmented into five independent cells. Each cell has a fanin of 29 including register and control lines (see Figure 3). WDATA RAM Module (1,152 bits) RDATA WADDR RADDR RAM
6	QL4016-1PLM	ETC	16/000 Usable PLD Gate QuickRAM ESP Combining Performance/ Density and Embedded RAM up to 16 simultaneous inputs and five outputs within a cell that can be fragmented into five independent cells. Each cell has a fanin of 29 including register and control lines (see Figure 3). WDATA RAM Module (1,152 bits) RDATA WADDR RADDR RAM
7	QL4016-2CF100M	ETC	16/000 Usable PLD Gate QuickRAM ESP Combining Performance/ Density and Embedded RAM up to 16 simultaneous inputs and five outputs within a cell that can be fragmented into five independent cells. Each cell has a fanin of 29 including register and control lines (see Figure 3). WDATA RAM Module (1,152 bits) RDATA WADDR RADDR RAM
8	CD74HC85E	Texas Instruments	High-Speed CMOS Logic 4-Bit Magnitude Comparator • Buffered inputs and outputs • Typical propagation delay: 13 ns (data to output at VCC = 5 V, CL = 15 pF, TA = 25℃) • Serial or parallel expansion without external gating • Fanout (over temperature range) – Standard outputs: 10 LSTTL loads – Bus dri
9	QL4016-2CF100C	ETC	16/000 Usable PLD Gate QuickRAM ESP Combining Performance/ Density and Embedded RAM up to 16 simultaneous inputs and five outputs within a cell that can be fragmented into five independent cells. Each cell has a fanin of 29 including register and control lines (see Figure 3). WDATA RAM Module (1,152 bits) RDATA WADDR RADDR RAM
10	QL4016-2CF100I	ETC	16/000 Usable PLD Gate QuickRAM ESP Combining Performance/ Density and Embedded RAM up to 16 simultaneous inputs and five outputs within a cell that can be fragmented into five independent cells. Each cell has a fanin of 29 including register and control lines (see Figure 3). WDATA RAM Module (1,152 bits) RDATA WADDR RADDR RAM
11	QL4016-2PF100C	ETC	16/000 Usable PLD Gate QuickRAM ESP Combining Performance/ Density and Embedded RAM up to 16 simultaneous inputs and five outputs within a cell that can be fragmented into five independent cells. Each cell has a fanin of 29 including register and control lines (see Figure 3). WDATA RAM Module (1,152 bits) RDATA WADDR RADDR RAM
12	QL4016-2PF100I	ETC	16/000 Usable PLD Gate QuickRAM ESP Combining Performance/ Density and Embedded RAM up to 16 simultaneous inputs and five outputs within a cell that can be fragmented into five independent cells. Each cell has a fanin of 29 including register and control lines (see Figure 3). WDATA RAM Module (1,152 bits) RDATA WADDR RADDR RAM
13	QL4016-2PF100M	ETC	16/000 Usable PLD Gate QuickRAM ESP Combining Performance/ Density and Embedded RAM up to 16 simultaneous inputs and five outputs within a cell that can be fragmented into five independent cells. Each cell has a fanin of 29 including register and control lines (see Figure 3). WDATA RAM Module (1,152 bits) RDATA WADDR RADDR RAM
14	QL4016-2PF144C	ETC	16/000 Usable PLD Gate QuickRAM ESP Combining Performance/ Density and Embedded RAM up to 16 simultaneous inputs and five outputs within a cell that can be fragmented into five independent cells. Each cell has a fanin of 29 including register and control lines (see Figure 3). WDATA RAM Module (1,152 bits) RDATA WADDR RADDR RAM
15	QL4016-2PF144I	ETC	16/000 Usable PLD Gate QuickRAM ESP Combining Performance/ Density and Embedded RAM up to 16 simultaneous inputs and five outputs within a cell that can be fragmented into five independent cells. Each cell has a fanin of 29 including register and control lines (see Figure 3). WDATA RAM Module (1,152 bits) RDATA WADDR RADDR RAM
16	QL4016-2PLI	ETC	16/000 Usable PLD Gate QuickRAM ESP Combining Performance/ Density and Embedded RAM up to 16 simultaneous inputs and five outputs within a cell that can be fragmented into five independent cells. Each cell has a fanin of 29 including register and control lines (see Figure 3). WDATA RAM Module (1,152 bits) RDATA WADDR RADDR RAM
17	QL4016-3PF100I	ETC	16/000 Usable PLD Gate QuickRAM ESP Combining Performance/ Density and Embedded RAM up to 16 simultaneous inputs and five outputs within a cell that can be fragmented into five independent cells. Each cell has a fanin of 29 including register and control lines (see Figure 3). WDATA RAM Module (1,152 bits) RDATA WADDR RADDR RAM
18	QL4016-3PF144I	ETC	16/000 Usable PLD Gate QuickRAM ESP Combining Performance/ Density and Embedded RAM up to 16 simultaneous inputs and five outputs within a cell that can be fragmented into five independent cells. Each cell has a fanin of 29 including register and control lines (see Figure 3). WDATA RAM Module (1,152 bits) RDATA WADDR RADDR RAM
19	QL4016-3PLI	ETC	16/000 Usable PLD Gate QuickRAM ESP Combining Performance/ Density and Embedded RAM up to 16 simultaneous inputs and five outputs within a cell that can be fragmented into five independent cells. Each cell has a fanin of 29 including register and control lines (see Figure 3). WDATA RAM Module (1,152 bits) RDATA WADDR RADDR RAM
20	QL4016-4PF144C	ETC	16/000 Usable PLD Gate QuickRAM ESP Combining Performance/ Density and Embedded RAM up to 16 simultaneous inputs and five outputs within a cell that can be fragmented into five independent cells. Each cell has a fanin of 29 including register and control lines (see Figure 3). WDATA RAM Module (1,152 bits) RDATA WADDR RADDR RAM