No. | parte # | Fabricante | Descripción | Hoja de Datos |
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Infineon Technologies AG |
2 Channel Serial Optimized Communication Controller with DMA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Logic Symbol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Typical Applications . . . . . . . . . . |
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Infineon Technologies AG |
ICs for Communications and presents some typical applications. • Chapter 2, Pin Description Lists pin locations with associated signals, categorizes signals according to function, and describes signals. • Chapter 3, Functional IC Description Gives a general functional ove |
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Infineon Technologies AG |
2 Channel Serial Optimized Communication Controller for HDLC/PPP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Logic Symbol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Typical Applications . . . . . . . . . . |
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Infineon Technologies AG |
2 Channel Serial Optimized Communication Controller . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Logic Symbol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Typical Applications . . . . . . . . . . |
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Infineon Technologies AG |
DMA Supported Serial Communication Controller with 4 Channels and presents some typical applications. • Chapter 2, Pin Description Lists pin locations with associated signals, categorizes signals according to function, and describes signals. • Chapters 3,4,5,6,7 Functional Description These chapters provide de |
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Infineon Technologies AG |
Quad E1/T1/J1 Framer and Line Interface Component for Long and Short Haul Applications “automatic short haul/long haul adjustment” available by setting LIM0.EQON = 1. Additional automatic resynchronization mode for T1 (new bit: FMR2.7 = AFRS). Additional compare status field (mode 2) in SS7 mode (new bit: CCR5.6 = CSF2). 2048 kHz synch |
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Infineon Technologies AG |
Quad E1/T1/J1 Framer and Line Interface Component for Long and Short Haul Applications “automatic short haul/long haul adjustment” available by setting LIM0.EQON = 1. Additional automatic resynchronization mode for T1 (new bit: FMR2.7 = AFRS). Additional compare status field (mode 2) in SS7 mode (new bit: CCR5.6 = CSF2). 2048 kHz synch |
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Infineon Technologies AG |
Line Interface Unit for DS3/ STS 1 and E3 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Logic Symbol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Typical Applications . . . . . . . . |
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Infineon Technologies AG |
ICs for Communications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8 Pin Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9 Pin Definitions and Function |
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Infineon Technologies AG |
Multichannel Network Interface Controller for HDLC and presents some typical applications. Furthermore it lists pin locations with associated signals, categorizes signals according to function and describes signals. • Chapter 2, Serial PCM Core This chapter provides a functional description of the s |
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Infineon Technologies AG |
ICs for Communications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13 Pin Configuration (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .15 Pin Definitions and Functions . . . . . . . . . |
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Infineon Technologies AG |
DSP Embedded Line and Port Interface Controller C Clock System Synchronization” 1.1 Clocking the VIP in LT-T Mode by DELIC Layer 1 Clock 1 6 .3 8 4 M H z DCXO 8 kH z PD MUX R EFCLK D ivid e r XCLK 1 6 .3 8 4 M H z PLL D ivid e r D ivid e r 1 5 .3 6 M H z IN C L K OSC /1 0 C e n tra l O ffice R |
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Infineon Technologies AG |
DSP Embedded Line and Port Interface Controller C Clock System Synchronization” 1.1 Clocking the VIP in LT-T Mode by DELIC Layer 1 Clock 1 6 .3 8 4 M H z DCXO 8 kH z PD MUX R EFCLK D ivid e r XCLK 1 6 .3 8 4 M H z PLL D ivid e r D ivid e r 1 5 .3 6 M H z IN C L K OSC /1 0 C e n tra l O ffice R |
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Infineon Technologies AG |
E1/T1/J1 Framer and Line Interface Component for Long- and Short-Haul Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Typical Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 External Signals . . . . . . . . . . |
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Infineon Technologies AG |
E1/T1/J1 Framer and Line Interface Component for Long- and Short-Haul Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Typical Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 External Signals . . . . . . . . . . |
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Infineon Technologies AG |
Single channel T3/E3 Framer & Line Interface for ATM/ Frame Relay and PPP/IP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Logic Symbol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Minimum System . . . . . . . . . . |
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