IK Semiconductor IW4 Hoja de datos

No.	parte #	Fabricante	Descripción
1	IW4516B	IK Semiconductor	Presettable Binary Up/Down Counter . This method provides a clean clock signal to the subsequent counting stage. • Operating Voltage Range: 3.0 to 18 V • Maximum input current of 1 µA at 18 V over full packagetemperature range; 100 nA at 18 V and 25°C • Noise margin (over full package
2	IW4029B	IK Semiconductor	Binary or BCD-Decade Counter the counter reaches its maximum count in the UP mode or the minimum count in the DOWN mode provided the CARRY IN signal is low. The CARRY IN signal in the low state can thus be considered a CLOCK ENABLE. The CARRY IN terminal must be connected to GND
3	IW4541B	IK Semiconductor	Programmable Timer tate after 2N-1 counts and IW4541BD SOIC remains in that state until another MASTER RESET pulse is applied or TA = -55° to 125° C for all packages the MODE input is set to a logic “1”. Timing is initialized by setting the AUTO RESET input (pin 5) to
4	IW4060B	IK Semiconductor	14-Bit Binary Divide/Counter NFORMATION IW4060BN Plastic IW4060BD SOIC TA = -55° to 125° C for all packages PIN ASSIGNMENT LOGIC DIAGRAM FUNCTION TABLE Inputs Osc In Reset L L X H Outputs Q No change Advance to next state All Outputs are low w w w .d e e h s a t a . u t
5	IW4027B	IK Semiconductor	Dual J-K Flip-Flop independent Set, Reset, and Clock inputs. Data is accepted when the Clock is LOW and transferred to the output on the positive-going edge of the Clock. The active HIGH asynchronous Reset and Set are independent and override the J, K, or Clock inputs.
6	IW4034B	IK Semiconductor	8-Bit Shift Register which allows many registers to feed data to a common bus. The A DATA lines are enabled only when this signal is high. Data storage through recirculation of data in each register stage is accomplished by making the A/B signal high and the AE signal lo
7	IW4503B	IK Semiconductor	Hex Buffer ND) DC Input Voltage (Referenced to GND) DC Output Voltage (Referenced to GND) DC Input Current, per Pin Power Dissipation in Still Air, Plastic DIP+ SOIC Package+ Power Dissipation per Output Transistor Storage Temperature Lead Temperature, 1 mm fro
8	IW4012B	IK Semiconductor	Dual 4-Input NAND Gate GND) DC Input Current, per Pin Power Dissipation in Still Air, Plastic DIP+ SOIC Package+ Power Dissipation per Output Transistor Storage Temperature Lead Temperature, 1 mm from Case for 10 Seconds (Plastic DIP or SOIC Package) Value -0.5 to +20 -0.
9	IW4043B	IK Semiconductor	Quad NOR R-S Latch (3-State) allows common busing of the outputs. • Operating Voltage Range: 3.0 to 18 V • Maximum input current of 1 µA at 18 V over full package-temperature range; 100 nA at 18 V and 25°C • Noise margin (over full package temperature range): 1.0 V min @ 5.0 V s
10	IW4006B	IK Semiconductor	18-Bit Static Shift Register 7 08 D4+4 FUNCTION TABLE Inputs C D1 L H X L H X L H X X L Outputs D1+4 / D2-D4 D1+4...D4+4 H 12 13 14 Storage Storage D1 L H Storage w . w w h s a t da X = don’t care t e e X X . u 4 m o c Storage Storage Storage D1...D4 VDD Positive
11	IW4528B	IK Semiconductor	Dual Monostable Multivibrator heet4U.com IW4528B MAXIMUM RATINGS* Symbol VCC VIN VOUT IIN PD PD Tstg TL * Parameter DC Supply Voltage (Referenced to GND) DC Input Voltage (Referenced to GND) DC Output Voltage (Referenced to GND) DC Input Current, per Pin Power Dissipation in S
12	IW4069UB	IK Semiconductor	Hex Inverter IIN PD Ptot Tstg TL * Parameter DC Supply Voltage (Referenced to GND) DC Input Voltage (Referenced to GND) DC Input Current, per Pin Power Dissipation in Still Air, Plastic DIP+ SOIC Package+ Power Dissipation per Output Transistor Storage Temperat
13	IW4518B	IK Semiconductor	Dual BCD Up Counter 4518BD SOIC TA = -55° to 125° C for all packages PIN ASSIGNMENT LOGIC DIAGRAM FUNCTION TABLE Inputs CLOCK ENABLE RESET H L X X L H X X X = don’t care L L L L L L H Outputs Mode Increment Counter Increment Counter No Change No Change No Change No C
14	IW4040B	IK Semiconductor	12-Bit Binary Counter ESET CLOCK Q1 PIN ASSIGNMENT FUNCTION TABLE Inputs Clock Reset L L X H= high level L = low level X=don’t care H Output Output state No change Advance to next state All Outputs are low RESET w w w .d h s a t a t e e . u 4 m o c 11 PIN 16 =
15	IW4520B	IK Semiconductor	Dual Binary Up Counter IW4520BD SOIC TA = -55° to 125° C for all packages PIN ASSIGNMENT LOGIC DIAGRAM FUNCTION TABLE Inputs CLOCK ENABLE RESET H L X X L H X X X = don’t care L L L L L L H Outputs Mode Increment Counter Increment Counter No Change No Change No Change N
16	IW4049B	IK Semiconductor	Hex Buffer/Converter logic-level conversion using only one supply (voltage (VCC). The input-signal high level (VIH) can exceed the VCC supply voltage when these devices are used for logic-level conversions. These devices are intended for use as CMOS to DTL/TTL converters
17	IW4053B	IK Semiconductor	Triple 2-Channel Analog Multiplexer/Demultiplexer perating Voltage Range: 3.0 to 18 V • Maximum input current of 1 µA at 18 V over full package-temperature range; 100 nA at 18 V and 25°C • Noise margin (over full package temperature range): 1.0 V min @ 5.0 V supply 2.0 V min @ 10.0 V supply 2.5 V mi
18	IW4071B	IK Semiconductor	Quad 2-Input OR Gate kage+ Power Dissipation per Output Transistor Storage Temperature Lead Temperature, 1 mm from Case for 10 Seconds (Plastic DIP or SOIC Package) Value -0.5 to +20 -0.5 to VCC +0.5 -0.5 to VCC +0.5 ±10 750 500 100 -65 to +150 260 Unit V V V mA mW mW
19	IW4093B	IK Semiconductor	Quad 2-Input NADN Schmitt Trigger oltage level 1 www.DataSheet4U.com IW4093B MAXIMUM RATINGS* Symbol VCC VIN IIN PD Ptot Tstg TL * Parameter DC Supply Voltage (Referenced to GND) DC Input Voltage (Referenced to GND) DC Input Current, per Pin Power Dissipation in Still Air, Plast
20	IW4502B	IK Semiconductor	Hex Inverter/Buffer permits common busing of the outputs, thus simplifying system design. A logic “1” on the DIRECTION input switches all six outputs to logic “0” if the OUTPUT ENABLE input is a logic “0”. • Operating Voltage Range: 3.0 to 18 V • Maximum input current o