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Hitachi Semiconductor |
Hex D-Type Flip-Flop with Master Reset • Outputs Source/Sink 24 mA Pin Arrangement MR 1 Q0 2 D0 3 D1 4 Q1 5 D2 6 Q2 7 GND 8 (Top view) 16 VCC 15 Q5 14 D5 13 D4 12 Q4 11 D3 10 Q3 9 CP HD74AC174 Logic Symbol D0 D1 D2 CP MR D3 D4 D5 Q0 Q1 Q2 Q3 Q4 Q5 Pin Names D0 to D5 CP MR Q0 to Q5 |
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Hitachi Semiconductor |
These devices each consist of four 2-input digital multiplexers with common select and strobe inputs • • • • • High Speed Operation: tpd (Data to Output) = 12 ns typ (CL = 50 pF) High Output Current: Fanout of 10 LSTTL Loads Wide Operating Voltage: VCC = 2 to 6 V Low Input Current: 1 µA max Low Quiescent Supply Current: ICC (static) = 4 µA max (Ta = |
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Hitachi Semiconductor |
Octal D-type Transparent Latches(with inverted 3-state outputs) • • • • • • LSTTL Output Logic Level Compatibility as well as CMOS Output Compatibility High Speed Operation: tpd (Data to Q) = 14 ns typ (CL = 50 pF) High Output Current: Fanout of 15 LSTTL Loads Wide Operating Voltage: VCC = 4.5 to 5.5 V Low Input |
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Hitachi Semiconductor |
Octal Bus Transceivers With 3 State Outputs low power dissipation that is about 1/5 of high speed bipolar logic IC. When the frequency is 10 MHz. The device has eight bus transceivers with three state outputs in a 20 pin package. Each device has an active low enable input ( G ) and a direction |
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Hitachi Semiconductor |
Octal D-type Flip-Flops (with 3-state outputs) • • • • • • LSTTL Output Logic Level Compatibility as well as CMOS Output Compatibility High Speed Operation: tpd (D to Q, Q) = 15 ns typ (CL = 50 pF) High Output Current: Fanout of 15 LSTTL Loads Wide Operating Voltage: VCC = 4.5 to 5.5 V Low Input |
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Hitachi Semiconductor |
Octal D-type Flip Flops with 3-state Outputs • • • • • • VCC = 2.0 V to 5.5 V All inputs VIH (Max.) = 5.5 V (@VCC = 0 V to 5.5 V) All outputs VOUT (Max.) = 5.5 V (@VCC = 0 V or output off state) Typical VOL ground bounce < 0.8 V (@VCC = 3.3 V, Ta = 25 °C) Typical VOH undershoot > 2.0 V (@VCC = |
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Hitachi Semiconductor |
Octal Buffers/Line Drivers (with 3-state outputs) • • • • • • LSTTL Output Logic Level Compatibility as well as CMOS Output Compatibility High Speed Operation: tpd (A to Y) = 12 ns typ (CL = 50 pF) High Output Current: Fanout of 15 LSTTL Loads Wide Operating Voltage: VCC = 4.5 to 5.5 V Low Input Cur |
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Hitachi Semiconductor |
Octal Bus Transceivers(with three-state outputs) any third party’s patent, copyright, trademark, or other intellectual property rights for information contained in this document. Hitachi bears no responsibility for problems that may arise with third party’s rights, including intellectual property |
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Hitachi Semiconductor |
Synchronous Decade Counters s or any third party’s patent, copyright, trademark, or other intellectual property rights for information contained in this document. Hitachi bears no responsibility for problems that may arise with third party’s rights, including intellectual prope |
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Hitachi Semiconductor |
16-bit Registered Transceivers with 3-state Outputs • VCC = 2.3 V to 3.6 V • Typical VOL ground bounce < 0.8 V (@VCC = 3.3 V, Ta = 25°C) • Typical VOH undershoot > 2.0 V (@VCC = 3.3 V, Ta = 25°C) • High output current ±24 mA (@V CC = 3.0 V) • Bus hold on data inputs eliminates the need for external pu |
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Hitachi Semiconductor |
Dual J-K Negative-edge-triggered Flip-Flops rty rights for information contained in this document. Hitachi bears no responsibility for problems that may arise with third party’s rights, including intellectual property rights, in connection with use of the information contained in this document |
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Hitachi Semiconductor |
16-bit Bus Transceivers with 3-state Outputs • • • • • • VCC = 2.0 V to 5.5 V All inputs VIH (Max.) = 5.5 V (@VCC = 0 V to 5.5 V) All outputs VOUT (Max.) = 5.5 V (@VCC = 0 V or output off state) Typical VOL ground bounce < 0.8 V (@VCC = 3.3 V, Ta = 25°C) Typical VOH undershoot > 2.0 V (@VCC = 3 |
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Hitachi Semiconductor |
Dual 1-of-4 Decoder/Demultiplexer • • • • • Multifunction Capability Two Completely Independent 1-of-4 Decoders Active Low Mutually Exclusive Outputs Outputs Source/Sink 24 mA HD74ACT139 has TTL-Compatible Inputs HD74AC139/HD74ACT139 Pin Arrangement Ea 1 A0a 2 A1a 3 O0a 4 O1a 5 O2a |
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Hitachi Semiconductor |
16-bit Buffer / Driver with 3-state Outputs • VCC = 2.3 V to 3.6 V • Typical VOL ground bounce < 0.8 V (@VCC = 3.3 V, Ta = 25°C) • Typical VOH undershoot > 2.0 V (@VCC = 3.3 V, Ta = 25°C) • High output current ±12 mA (@VCC = 3.0 V) • All outputs have equivalent 26 Ω series resistors, so no ext |
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Hitachi Semiconductor |
18-bit Universal Bus Driver with 3-state Outputs and Inverted Latch Enable • Meets “PC SDRAM registered DIMM design support document, Rev. 1.2” • VCC = 2.3 V to 3.6 V • Typical VOL ground bounce < 0.8 V (@VCC = 3.3 V, Ta = 25°C) • Typical VOH undershoot > 2.0 V (@VCC = 3.3 V, Ta = 25°C) • High output current ±12 mA (@V CC = |
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Hitachi Semiconductor |
Dual 4-bit Binary Counters • • • • • High Speed Operation: tpd (A to QA) = 16 ns typ (CL = 50 pF) High Output Current: Fanout of 10 LSTTL Loads Wide Operating Voltage: VCC = 2 to 6 V Low Input Current: 1 µA max Low Quiescent Supply Current: ICC (static) = 4 µA max (Ta = 25°C) |
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Hitachi Semiconductor |
Quad Analog Switches/Quad Multiplexers • High Speed Operation • Wide Operating Voltage • Low Quiescent Supply Current Function Table Control L H GND ≤ Vin ≤ VCC GND ≤ Vout ≤ VCC Switch OFF ON HD74HC4066 Pin Arrangement In 1 Out 1 Out 2 In 2 Control 2 Control 3 GND 1 In C 14 VCC 13 Co |
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Hitachi Semiconductor |
4-bit Latch/4-to-16-line Decoder • • • • • High Speed Operation: tpd (Data to S) = 20 ns typ (CL = 50 pF) High Output Current: Fanout of 10 LSTTL Loads Wide Operating Voltage: VCC = 2 to 6 V Low Input Current: 1 µA max Low Quiescent Supply Current: ICC (static) = 4 µA max (Ta = 25°C |
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Hitachi Semiconductor |
Dual BCD Use Converters/Dual Binary Up Converters • • • • • High Speed Operation High Output Current: Fanout of 10 LSTTL Loads Wide Operating Voltage: VCC = 2 to 6 V Low Input Current: 1 µA max Low Quiescent Supply Current: ICC (static) = 4 µA max (Ta = 25°C) Function Table Clock Enable H L X X L H |
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Hitachi Semiconductor |
Quadruple 2-input Positive AND Gates • Ordering Information Part Name Package Type Package Code (Previous Code) Package Abbreviation HD74LS08P DILP-14 pin PRDP0014AB-B (DP-14AV) P HD74LS08FPEL SOP-14 pin (JEITA) PRSP0014DF-B (FP-14DAV) FP HD74LS08RPEL SOP-14 pin (JEDEC) PR |
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Desde 2024. D4U Semiconductor.
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