No. | parte # | Fabricante | Descripción | Hoja de Datos |
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Hitachi Semiconductor |
Hex D-Type Flip-Flop with Master Reset • Outputs Source/Sink 24 mA Pin Arrangement MR 1 Q0 2 D0 3 D1 4 Q1 5 D2 6 Q2 7 GND 8 (Top view) 16 VCC 15 Q5 14 D5 13 D4 12 Q4 11 D3 10 Q3 9 CP HD74AC174 Logic Symbol D0 D1 D2 CP MR D3 D4 D5 Q0 Q1 Q2 Q3 Q4 Q5 Pin Names D0 to D5 CP MR Q0 to Q5 |
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Hitachi Semiconductor |
16-bit Registered Transceivers with 3-state Outputs • VCC = 2.3 V to 3.6 V • Typical VOL ground bounce < 0.8 V (@VCC = 3.3 V, Ta = 25°C) • Typical VOH undershoot > 2.0 V (@VCC = 3.3 V, Ta = 25°C) • High output current ±24 mA (@V CC = 3.0 V) • Bus hold on data inputs eliminates the need for external pu |
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Hitachi Semiconductor |
Octal D-type Flip Flops with 3-state Outputs • • • • • • VCC = 2.0 V to 5.5 V All inputs VIH (Max.) = 5.5 V (@VCC = 0 V to 5.5 V) All outputs VOUT (Max.) = 5.5 V (@VCC = 0 V or output off state) Typical VOL ground bounce < 0.8 V (@VCC = 3.3 V, Ta = 25 °C) Typical VOH undershoot > 2.0 V (@VCC = |
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Hitachi Semiconductor |
16-bit Buffer / Driver with 3-state Outputs • VCC = 2.3 V to 3.6 V • Typical VOL ground bounce < 0.8 V (@VCC = 3.3 V, Ta = 25°C) • Typical VOH undershoot > 2.0 V (@VCC = 3.3 V, Ta = 25°C) • High output current ±12 mA (@VCC = 3.0 V) • All outputs have equivalent 26 Ω series resistors, so no ext |
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Hitachi Semiconductor |
18-bit Universal Bus Driver with 3-state Outputs and Inverted Latch Enable • Meets “PC SDRAM registered DIMM design support document, Rev. 1.2” • VCC = 2.3 V to 3.6 V • Typical VOL ground bounce < 0.8 V (@VCC = 3.3 V, Ta = 25°C) • Typical VOH undershoot > 2.0 V (@VCC = 3.3 V, Ta = 25°C) • High output current ±12 mA (@V CC = |
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Hitachi Semiconductor |
Dual 1-of-4 Decoder/Demultiplexer • • • • • Multifunction Capability Two Completely Independent 1-of-4 Decoders Active Low Mutually Exclusive Outputs Outputs Source/Sink 24 mA HD74ACT139 has TTL-Compatible Inputs HD74AC139/HD74ACT139 Pin Arrangement Ea 1 A0a 2 A1a 3 O0a 4 O1a 5 O2a |
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Hitachi Semiconductor |
18-bit Buffers / Drivers with 3-state Outputs • VCC = 2.3 V to 3.6 V • Typical VOL ground bounce < 0.8 V (@VCC = 3.3 V, Ta = 25°C) • Typical VOH undershoot > 2.0 V (@VCC = 3.3 V, Ta = 25°C) • High output current ±12 mA (@VCC = 3.0 V) • Bus hold on data inputs eliminates the need for external pul |
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Hitachi Semiconductor |
8-bit Shift Register • Outputs Source/Sink 24 mA • HD74ACT166 has TTL-Compatible Inputs Pin Arrangement DS 1 P0 2 P1 3 P2 4 P3 5 CP2 6 CP1 7 GND 8 (Top view) 16 VCC 15 PE 14 P7 13 Q7 12 P6 11 P5 10 P4 9 MR HD74AC166/HD74ACT166 Logic Symbol 15 2 3 4 5 10 11 12 14 PE |
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Hitachi Semiconductor |
8-bit Addressable Latch • • • • • • • Serial-to-Parallel Conversion Eight Bits of Storage with Output of Each Bit Available Random (Addressable) Data Entry Active High Demultiplexing or Decoding Capability Easily Expandable Common Clear Outputs Source/Sink 24 mA HD74AC259 |
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Hitachi Semiconductor |
20-bit Universal Bus Driver with 3-state Outputs • VCC = 2.3 V to 3.6 V • Typical VOL ground bounce < 0.8 V (@VCC = 3.3 V, Ta = 25°C) • Typical VOH undershoot > 2.0 V (@VCC = 3.3 V, Ta = 25°C) • High output current ±24 mA (@V CC = 3.0 V) HD74ALVC16836 Function Table Inputs OE H L L L L L L LE X L |
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Hitachi Semiconductor |
18-bit Universal Bus Driver with 3-state Outputs and Inverted Latch Enable • Supports PC133 and meets “PC SDRAM registered DIMM specification, Rev. 1.1” • VCC = 2.3 V to 3.6 V • Typical VOL ground bounce < 0.8 V (@VCC = 3.3 V, Ta = 25°C) • Typical VOH undershoot > 2.0 V (@VCC = 3.3 V, Ta = 25°C) • High output current ±12 mA |
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Hitachi Semiconductor |
18-bit Universal Bus Transceivers with 3-state Outputs • VCC = 2.3 V to 3.6 V • Typical VOL ground bounce < 0.8 V (@VCC = 3.3 V, Ta = 25°C) • Typical VOH undershoot > 2.0 V (@VCC = 3.3 V, Ta = 25°C) • High output current ±12 mA (@VCC = 3.0 V) • Bus hold on data inputs eliminates the need for external pul |
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Hitachi Semiconductor |
Dual D-type Positive Edge-triggered Flip Flops with Clear and Preset • VCC = 4.5 to 5.5 V operation • Input terminal has protection diode Function Table Inputs PRE L H L H H H CLR H L L H H H CLK X X X ↑ ↑ L D X X X H L X Outputs Q H L H H L Q0 *1 Q L H H *1 L H Q0 H : High level L : Low level X : Immaterial ↑ : Lo |
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Hitachi Semiconductor |
4 x 4 Register File with 3-State Output |
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Hitachi Semiconductor |
Octal Buffer/Line Driver with 3-State Output • 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers • Outputs Source/Sink 24 mA • HD74ACT244 has TTL-Compatible Inputs Pin Arrangement OE1 1 2 3 4 5 6 7 8 9 GND 10 (Top view) 20 VCC 19 OE2 18 17 16 15 14 13 12 11 HD74AC244/HD74AC |
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Hitachi Semiconductor |
16-bit Buffers / Drivers with 3-state Outputs • VCC = 2.3 V to 3.6 V • Typical VOL ground bounce < 0.8 V (@VCC = 3.3 V, Ta = 25°C) • Typical VOH undershoot > 2.0 V (@VCC = 3.3 V, Ta = 25°C) • Bus hold on data inputs eliminates the need for external pullup / pulldown resistors Function Table Inp |
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Hitachi Semiconductor |
3.3-V 10-bit Flip Flops with Dual Outputs and 3-state Outputs • VCC = 2.3 V to 3.6 V • Typical VOL ground bounce < 0.8 V (@VCC = 3.3 V, Ta = 25°C) • Typical VOH undershoot > 2.0 V (@VCC = 3.3 V, Ta = 25°C) • High output current ±12 mA (@V CC = 3.0 V) • Bus hold on data inputs eliminates the need for external pu |
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Hitachi Semiconductor |
1-bit to 2-bit Address Driver with 3-state Outputs • VCC = 2.3 V to 3.6 V • Typical VOL ground bounce < 0.8 V (@VCC = 3.3 V, Ta = 25°C) • Typical VOH undershoot > 2.0 V (@VCC = 3.3 V, Ta = 25°C) • High output current ±24 mA (@V CC = 3.0 V) • Bus hold on data inputs eliminates the need for external pu |
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Hitachi Semiconductor |
Octal Edge-Triggered D-type Flip-Flops with 3-state Outputs • • • • • • VCC = 2.0 V to 5.5 V operation All inputs VIH (Max.) = 5.5 V (@VCC = 0 V to 5.5 V) All outputs VO (Max.) = 5.5 V (@VCC = 0 V) Typical VOL ground bounce < 0.8 V (@VCC = 3.3 V, Ta = 25°C) Typical VOH undershoot > 2.3 V (@VCC = 3.3 V, Ta = 2 |
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Hitachi Semiconductor |
Single Buffer / Driver with Open Drain ズムをするは、 、プログラム、アルゴリズムでするだけでなく、システムでにし、お のにおいてをしてください。ルネサス テクノロジは、にするはいま せん。 6. にされたは、 にかかわるようなのでされるあるいはシステムにいら れることをとして、されたものではありません。にのを、、 、、、あるいはシステムなど、へのごをご のには、ルネサス テクノロジ、ルネサスまたはへごください。 7. の、については、によるルネサス テクノロジののがです。 8. にしについてのおいわせ、 そのおきのがございましたらル |
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