No. | parte # | Fabricante | Descripción | Hoja de Datos |
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Hitachi Semiconductor |
These devices each consist of four 2-input digital multiplexers with common select and strobe inputs • • • • • High Speed Operation: tpd (Data to Output) = 12 ns typ (CL = 50 pF) High Output Current: Fanout of 10 LSTTL Loads Wide Operating Voltage: VCC = 2 to 6 V Low Input Current: 1 µA max Low Quiescent Supply Current: ICC (static) = 4 µA max (Ta = |
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Hitachi Semiconductor |
Octal D-type Transparent Latches(with inverted 3-state outputs) • • • • • • LSTTL Output Logic Level Compatibility as well as CMOS Output Compatibility High Speed Operation: tpd (Data to Q) = 14 ns typ (CL = 50 pF) High Output Current: Fanout of 15 LSTTL Loads Wide Operating Voltage: VCC = 4.5 to 5.5 V Low Input |
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Hitachi |
8-to-3-line Octal Priority Encoder • • • • • High Speed Operation: tpd (0 - 7 to A0 - A2) = 15 ns typ (CL = 50 pF) High Output Current: Fanout of 10 LSTTL Loads Wide Operating Voltage: VCC = 2 to 6 V Low Input Current: 1 µA max Low Quiescent Supply Current: ICC (static) = 4 µA max (Ta |
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Hitachi Semiconductor |
Octal D-type Flip-Flops (with 3-state outputs) • • • • • • LSTTL Output Logic Level Compatibility as well as CMOS Output Compatibility High Speed Operation: tpd (D to Q, Q) = 15 ns typ (CL = 50 pF) High Output Current: Fanout of 15 LSTTL Loads Wide Operating Voltage: VCC = 4.5 to 5.5 V Low Input |
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Hitachi Semiconductor |
Octal Buffers/Line Drivers (with 3-state outputs) • • • • • • LSTTL Output Logic Level Compatibility as well as CMOS Output Compatibility High Speed Operation: tpd (A to Y) = 12 ns typ (CL = 50 pF) High Output Current: Fanout of 15 LSTTL Loads Wide Operating Voltage: VCC = 4.5 to 5.5 V Low Input Cur |
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Hitachi |
8-bit Binary Counter/Register a direct clear input CCLR and a count enable input C CKEN. For cascading a ripple carry output R CO is provided. Expansion is easily accomplished by tying R CO of the first stage to CCKEN of the second stage, etc. Both the counter and register clocks |
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Hitachi |
8-bit Shift Register/Latch • • • • • High Speed Operation: tpd (RCK to Q) = 17 ns typ (C L = 50 pF) High Output Current: Fanout of 15 LSTTL Loads (QA to QH outputs) Wide Operating Voltage: VCC = 2 to 6 V Low Input Current: 1 µA max Low Quiescent Supply Current: ICC (static) = |
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Hitachi |
8-bit Parallel-out Shift Register • • • • • High Speed Operation: tpd (Clock to Q) = 14.5 ns typ (CL = 50 pF) High Output Current: Fanout of 10 LSTTL Loads Wide Operating Voltage: VCC = 2 to 6 V Low Input Current: 1 µA max Low Quiescent Supply Current: ICC (static) = 4 µA max Functi |
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Hitachi Semiconductor |
Dual 4-bit Binary Counters • • • • • High Speed Operation: tpd (A to QA) = 16 ns typ (CL = 50 pF) High Output Current: Fanout of 10 LSTTL Loads Wide Operating Voltage: VCC = 2 to 6 V Low Input Current: 1 µA max Low Quiescent Supply Current: ICC (static) = 4 µA max (Ta = 25°C) |
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Hitachi Semiconductor |
Quad Analog Switches/Quad Multiplexers • High Speed Operation • Wide Operating Voltage • Low Quiescent Supply Current Function Table Control L H GND ≤ Vin ≤ VCC GND ≤ Vout ≤ VCC Switch OFF ON HD74HC4066 Pin Arrangement In 1 Out 1 Out 2 In 2 Control 2 Control 3 GND 1 In C 14 VCC 13 Co |
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Hitachi Semiconductor |
4-bit Latch/4-to-16-line Decoder • • • • • High Speed Operation: tpd (Data to S) = 20 ns typ (CL = 50 pF) High Output Current: Fanout of 10 LSTTL Loads Wide Operating Voltage: VCC = 2 to 6 V Low Input Current: 1 µA max Low Quiescent Supply Current: ICC (static) = 4 µA max (Ta = 25°C |
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Hitachi Semiconductor |
Dual BCD Use Converters/Dual Binary Up Converters • • • • • High Speed Operation High Output Current: Fanout of 10 LSTTL Loads Wide Operating Voltage: VCC = 2 to 6 V Low Input Current: 1 µA max Low Quiescent Supply Current: ICC (static) = 4 µA max (Ta = 25°C) Function Table Clock Enable H L X X L H |
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Hitachi Semiconductor |
Inverter with Schmitt-trigger Input • The basic gate function is lined up as hitachi uni logic series. • Supplied on emboss taping for high speed automatic mounting. • Electrical characteristics equivalent to the HD74HC14 Supply voltage range : 2 to 6 V Operating temperature range : –4 |
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Hitachi Semiconductor |
14-stage Binary Counter • • • • • High Speed Operation: tpd (Clock to Q1) = 14 ns typ (CL = 50 pF) High Output Current: Fanout of 10 LSTTL Loads Wide Operating Voltage: VCC = 2 to 6 V Low Input Current: 1 µA max Low Quiescent Supply Current: ICC (static) = 4 µA max (Ta = 25 |
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Hitachi Semiconductor |
Quad. Tridirectional Bus Transceiver • • • • • High Speed Operation High Output Current: Fanout of 15 LSTTL Loads Wide Operating Voltage: VCC = 2 to 6 V Low Input Current: 1 µA max Low Quiescent Supply Current: ICC (static) = 4 µA max (Ta = 25°C) HD74HC442/HD74HC443HD74HC444 Function T |
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Hitachi Semiconductor |
Octal Bus Transceivers/Registers • • • • • High Speed Operation: tpd (Bus to Bus) = 16 ns typ (CL = 50 pF) High Output Current: Fanout of 15 LSTTL Loads Wide Operating Voltage: VCC = 2 to 6 V Low Input Current: 1 µA max Low Quiescent Supply Current: ICC (static) = 4 µA max (Ta = 25° |
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Hitachi Semiconductor |
2-input Exclusive-OR Gate • The basic gate function is lined up as hitachi uni logic series. • Supplied on emboss taping for high speed automatic mounting. • Electrical characteristics equivalent to the HD74HC86 Supply voltage range : 2 to 6 V Operating temperature range : –4 |
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Hitachi Semiconductor |
Octal Buffers/Line Drivers/Line Receivers(with noninverted 3-state outputs) • • • • • High Speed Operation: tpd = 11 ns typ (CL = 50 pF) High Output Current: Fanout of 15 LSTTL Loads Wide Operating Voltage: VCC = 2 to 6 V Low Input Current: 1 µA max Low Quiescent Supply Current: ICC (static) = 4 µA max (Ta = 25°C) Function |
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Hitachi Semiconductor |
Dual Decade Counters • • • • • High Speed Operation: tpd (Clock A to QA) = 11 ns typ (CL = 50 pF) High Output Current: Fanout of 10 LSTTL Loads Wide Operating Voltage: VCC = 2 to 6 V Low Input Current: 1 µA max Low Quiescent Supply Current: ICC (static) = 4 µA max (Ta = |
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Hitachi Semiconductor |
Dual Retriggerable Monostable Multivibrators output-pulse-duration control by two methods. The basic pulse duration is programmed by selection of external resistance and capacitance values. Once triggered, the basic pulse duration may be extended by retriggering the gated low-level-active (A) o |
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