No. | parte # | Fabricante | Descripción | Hoja de Datos |
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Fujitsu |
NMOS Universal Peripheral Interface 8-Bit Microcomputer • Processo |
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Fujitsu |
NMOS Single-Chip 8-Bit Microcomputer • 8-bit Parallel Microcomputer • 12-bit Addressing • 96 Instructions: 70% Single Byte • 1.87SJ.IS Cycle (E-Verslon) 2.Sps Cycle (N-Version) All Instructions are 1 or 2 Cycles. • 2K x 8 ROM (MBL8049 only) 128x8 RAM 271/0 Lines • Interval Timer/Event |
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Fujitsu |
NMOS 16-BIT MICROPROCESSOR US* System Compatible Interface • 40-Pin DIP: Ceramic DIP (Suffix: -CI Plastic DIP (Suffix: -PI Fig. 1 - BLOCK DIAGRAM EXECUTION UNIT BUS INTERFACE UNIT ! I I REGISTER FILE RELOCATION ! REGISTER FILE DATA POINTER AND INDEX REGS (8 WORDS) SEGMEN |
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Fujitsu |
NMOS Single-Chip 8-Bit Microcomputer • 8-bit Parallel Microcomputer • 12-bit Addressing • 96 Instructions: 70% Single Byte • 1.87SJ.IS Cycle (E-Verslon) 2.Sps Cycle (N-Version) All Instructions are 1 or 2 Cycles. • 2K x 8 ROM (MBL8049 only) 128x8 RAM 271/0 Lines • Interval Timer/Event |
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Fujitsu |
NMOS Bus Controller C MWTC CONTROL OUTPUTS ODETN/' ] ALE MCE READY CLK Sf MCE ALE MB CMDLY MRDC MWTC GND Vee SO M/iQ DT/R DEN CEN/AEN CENL INTA IORC IOWC *Multibus is a patented bus of Intel. Portions Reprinted by permission of Intel Corporation © Intel Corporation, |
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Fujitsu |
NMOS Single-Chip 8-Bit Microcomputer except the on-chip memory. The MBL8051 AH/MBL8031 AH can have up to 64K x 8-bit program memory and up to (64K + 128) x 8-bit data memory in expanded system configuration. Both microcomputers can use standard TTL compatible memories and most byte-orie |
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Fujitsu |
NMOS Single-Chip 8-Bit Microcomputer • 8-bit Parallel Microcomputer • 12-bit Addressing • 96 Instructions: 70% Single Byte • 1.87SJ.IS Cycle (E-Verslon) 2.Sps Cycle (N-Version) All Instructions are 1 or 2 Cycles. • 2K x 8 ROM (MBL8049 only) 128x8 RAM 271/0 Lines • Interval Timer/Event |
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Fujitsu |
NMOS Universal Peripheral Interface 8-Bit Microcomputer • Processor: 8-bit parallel processing • Register: One 8-bit Status Register (for Interface with master process |
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Fujitsu |
NMOS 8 & 16-BIT I/O PROCESSOR g dramatically improved performance in I/O intensive applications. MBL 8089 provides two I/O channels, each supporting a transfer rate up to 1.25 Mbyte/sec (2.00 Mbyte/sec) at the standard clock frequency of 5 MHz(8 MHz). Memory based communication b |
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Fujitsu |
NMOS 8-BIT MICROPROCESSOR IP (Suffix: -C) Plastic DIP (Suffix: -P) Fig. 1 - BLOCK DIAGRAM Fig. 2 - PIN CONFIGURATION BUS CS INTERFACE SS UNIT DS IP A ·BUS EXECUTION UNIT AH AL BH BL CH CL DH DL SP BP SI DI FLAGS Portions Reprinted by permission of Inte |
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Fujitsu |
NMOS 8-BIT MICROPROCESSOR IP (Suffix: -C) Plastic DIP (Suffix: -P) Fig. 1 - BLOCK DIAGRAM Fig. 2 - PIN CONFIGURATION BUS CS INTERFACE SS UNIT DS IP A ·BUS EXECUTION UNIT AH AL BH BL CH CL DH DL SP BP SI DI FLAGS Portions Reprinted by permission of Inte |
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Fujitsu |
NMOS 8-BIT MICROPROCESSOR IP (Suffix: -C) Plastic DIP (Suffix: -P) Fig. 1 - BLOCK DIAGRAM Fig. 2 - PIN CONFIGURATION BUS CS INTERFACE SS UNIT DS IP A ·BUS EXECUTION UNIT AH AL BH BL CH CL DH DL SP BP SI DI FLAGS Portions Reprinted by permission of Inte |
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Fujitsu |
NMOS Single-Chip 8-Bit Microcomputer • 8-bit Parallel Microcomputer • 12-bit Addressing • 96 Instructions: 70% Single Byte • 1.87SJ.IS Cycle (E-Verslon) 2.Sps Cycle (N-Version) All Instructions are 1 or 2 Cycles. • 2K x 8 ROM (MBL8049 only) 128x8 RAM 271/0 Lines • Interval Timer/Event |
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Fujitsu |
NMOS Single-Chip 8-Bit Microcomputer The Fujitsu MBL8048/MBL8035 is a totally self-contained 8-bit parallel one-chip microcomputer fabricated wtih an N-channel silicon gate MOS process. The MBL8048 has a 1K x 8 ROM program memory, a 64 x 8 RAM data memory, 27 I/O ports, an 8-bit timer/ |
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Fujitsu |
BUS CONTROLLER SSIGNMENT {so MBL 80B61 MBL 80881 _ MBL 8089 Sl STATUS 51 CLK CONTROL ( AEN INPUT CEN lOB COM · MAND SIGNAL GENERATOR CONTROL LOGIC CONTROL SIGNAL GENERATOR +5V GND MRDC MWTC AMWC 10RC 10WC MULTIBUS* COMMAND SIGNALS AIOWC INTA DTiR 1ADDRE |
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Fujitsu |
NMOS Universal Peripheral Interface 8-Bit Microcomputer • Processor: 8-bit parallel processing • Register: One 8-bit Status Register (lor Interface with master |
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Fujitsu |
NMOS Universal Peripheral Interface 8-Bit Microcomputer • Processor: 8-bit parallel processing • Register: One 8-bit Status Register (for Interface with master process |
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Fujitsu |
Bipolar Clock Generator / Driver |
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Fujitsu |
NMOS PROGRAMMABLE INTERRUPT CONTROLLER CONTROL LOGIC READ/ WAITE LOGIC AO 05------' CAS 0 CAS 1 CASCADE BUFFER! COMPARATOR INTERNAL BUS IRO IR1 IR2 IR3 IR4 IR5 IR6 , -_ _.--~ IR7 • Trade Mark of Intel Corporation Portions Reprinted by permission of Intel Corporation © Intel Corporat |
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Fujitsu |
NMOS HIGH-INTEGRATION 8-BIT MICROPROCESSOR Set: Enhanced MBl 8088-2 CPU Clock Generator 2 Independent. High ·Speed DMA Channels Programmable Interrupt Controller 3 Programmable 16 ·bit Timers Programmable Memory and Peripheral Chip-Select logic Programmable Wait State Generator local Bus Contro |
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