Fairchild Semiconductor DM9 Hoja de datos

No.	parte #	Fabricante	Descripción
1	DM96LS02	Fairchild Semiconductor	Dual Retriggerable Resettable Monostable Multivibrator s Required timing capacitance reduced by factors of 10 to 100 over conventional designs s Broad timing resistor range—1.0 kΩ to 2.0 MΩ s Output Pulse Width is variable over a 2000:1 range by resistor control s Propagation delay of 35 ns s 0.3V hyster
2	96S02	Fairchild Semiconductor	DM96S02 gic Diagram Connection Diagram VCC = Pin 16 GND = Pin 8 Pin Descriptions Pin Names I0 I1 CD Q1 - 2 Q1 - 2 CX1, 2 RX1,2 Description Trigger Input (Active Falling Edge) Schmitt Trigger Input (Active Rising-Edge) Direct Clear Input (Active-LOW) True
3	DM96L02	Fairchild Semiconductor	Dual Retriggerable Resettable Monostable Multivibrator s Retriggerable, 0% to 100% duty cycle s DC level triggering, insensitive to transition times s Leading or trailing-edge triggering s Complementary outputs with active pull-ups s Pulse width compensation for ∆VCC and ∆TA s 50 ns to ∞ output pulse wid
4	DM9324	Fairchild Semiconductor	5-Bit Comparator Immaterial © 2000 Fairchild Semiconductor Corporation DS009792 www.fairchildsemi.com DataSheet4U.com DataSheet 4 U .com www.DataSheet4U.com DM9324 Functional Description The ’24 5-bit comparators use combinational circuitry to directly genera
5	DM9374	Fairchild Semiconductor	7-Segment Decoder/Driver/Latch means that data can be routed directly from high speed counters and frequency dividers into the display without slowing down the system clock or providing intermediate data storage. The latch/decoder combination is a simple system which drives LED di
6	DM9368	Fairchild Semiconductor	7-Segment Decoder/Driver/Latch with Constant Current Source Outputs means that data can be routed directly from high speed counters and frequency dividers into the display without slowing down the system clock or providing intermediate data storage. Another feature of the DM9368 is that the unit loading on the data i
7	DM9602	Fairchild Semiconductor	Dual Retriggerable Resettable One Shots s 70 ns to ∞ output width range s Resettable and retriggerable—0% to 100% duty cycle s TTL input gating—leading or trailing edge triggering s Complementary TTL outputs s Optional retrigger lock-out capability s Pulse width compensated for VCC and tem
8	DM96S02	Fairchild Semiconductor	Dual Retriggerable Resettable Monostable Multivibrator Pin 16 GND = Pin 8 Pin Descriptions Pin Names I0 I1 CD Q1 - 2 Q1 - 2 CX1, 2 RX1,2 Description Trigger Input (Active Falling Edge) Schmitt Trigger Input (Active Rising-Edge) Direct Clear Input (Active-LOW) True Pulse Output Complementary Pulse Outpu
9	DM9328	Fairchild Semiconductor	Dual 8-Bit Shift Register 1) additional gating is provided at the input to both shift registers so that the input is easily multiplexed between two sources; 2) the clock of each register may be provided separately or together; 3) both the true and complementary outputs are p