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Schmitt-Trigger Inverter/ CMOS Logic Level Shifter C74VHC1GT14 to be used to interface 5 V circuits to 3 V circuits. The output structures also provide protection when V CC = 0 V. These input and output structures help prevent device destruction caused by supply voltage – input/output voltage mismatc |
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2-Input NOR Gate / CMOS Logic Level Shifter to interface 5 V circuits to 3 V circuits. The output structures also provide protection when V CC = 0 V. These input and output structures help prevent device destruction caused by supply voltage – input/output voltage mismatch, battery backup, hot |
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ANALOG Switch are applied, regardless of the supply voltage. This allows the MC74VHC1GT66 to be used to interface 5 V circuits to 3 V circuits. • High Speed: t PD = 20 ns (Typ) at V CC = 5 V • Low Power Dissipation: I CC = 2 µA (Max) at T A = 25°C • Diode Protect |
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2-Input NAND Gate / CMOS Logic Level Shifter to interface 5 V circuits to 3 V circuits. The output structures also provide protection when V CC = 0 V. These input and output structures help prevent device destruction caused by supply voltage – input/output voltage mismatch, battery backup, hot |
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Inverting Buffer / CMOS Logic Level Shifter d to interface 5 V circuits to 3 V circuits. The output structures also provide protection when V CC = 0 V. These input and output structures help prevent device destruction caused by supply voltage – input/output voltage mismatch, battery backup, ho |
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2-Input AND Gate 16 MARKING DIAGRAMS 5 4 1 2 3 VXd www.DataSheet4U.com SC –88A/SOT –353/SC –70 DF SUFFIX CASE 419A Pin 1 d = Date Code 5 4 Figure 1. Pinout (Top View) 1 2 3 VXd Figure 2. Logic Symbol Pin 1 d = Date Code TSOP –5/SOT –23/SC –59 DT SUFFIX CASE 483 |
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Inverter GRAMS 5 4 1 2 3 VFd www.DataSheet4U.com SC –88A / SOT –353/SC –70 DF SUFFIX CASE 419A Pin 1 d = Date Code 5 4 Figure 1. Pinout (Top View) 1 2 3 VFd Figure 2. Logic Symbol Pin 1 d = Date Code TSOP –5/SOT –23/SC –59 DT SUFFIX CASE 483 FUNCTION TABLE |
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Schmitt-Trigger Inverter KING DIAGRAMS 5 4 1 2 3 VAd www.DataSheet4U.com SC –70/SC –88A/SOT –353 DF SUFFIX CASE 419A Pin 1 d = Date Code 5 4 Figure 1. Pinout (Top View) 1 2 3 VAd Figure 2. Logic Symbol Pin 1 d = Date Code SOT –23/TSOP –5/SC –59 DT SUFFIX CASE 483 FUNCTION |
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Noninverting Buffer / CMOS Logic Level Shifter be used to interface 5 V circuits to 3 V circuits. The output structures also provide protection when V CC = 0 V. These input and output structures help prevent device destruction caused by supply voltage – input/output voltage mismatch, battery bac |
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2-Input Exclusive OR Gate / CMOS Logic Level Shifter llows the MC74VHC1GT86 to be used to interface 5 V circuits to 3 V circuits. The output structures also provide protection when V CC = 0 V. These input and output structures help prevent device destruction caused by supply voltage – input/output volt |
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Unbuffered Inverter V • Low Power Dissipation: I CC = 2 mA (Max) at T A = 25°C • Power Down Protection Provided on Inputs • Balanced Propagation Delays • Pin and Function Compatible with Other Standard Logic Families • Chip Complexity: FETs = 105; Equivalent Gates = 26 |
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Desde 2024. D4U Semiconductor.
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