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Texas Instruments |
QUADRUPLE 2-INPUT POSITIVE-NOR GATES thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. FUNCTION TABLE (each gate) INPUTS AB OUTPUT Y HX L XH L LL H logic diagram (positive logic) 2 1A 3 1B 5 2A 6 2B 1 1Y 4 2Y 8 3A 9 3B 11 4A 12 4 |
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ETC |
LCD |
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ETC |
Plug ±.41 T ±.13 N +.02 -.13 12.01 14.99 19.05 22.23 25.40 28.58 31.75 34.73 38.10 V Thread UNEF Class 2A .4375-28 .5625-24 .6875-24 .8125-20 .9375-20 1.0625-18 1.1875-18 1.3125-18 1.4375-18 Shell Size KK Max 8 10 12 14 16 18 20 22 24 20.62 22.23 25.4 |
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Texas Instruments |
QUADRUPLE 2-INPUT POSITIVE-NOR GATE CT02N Tube of 50 SN74HCT02D SOIC – D Reel of 2500 SN74HCT02DR HCT02 Reel of 250 SN74HCT02DT –40°C to 85°C SOP – NS Reel of 2000 SN74HCT02NSR HCT02 SSOP – DB Reel of 2000 SN74HCT02DBR HT02 Tube of 90 SN74HCT02PW TSSOP – PW Reel of 200 |
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Texas Instruments |
QUADRUPLE 2-INPUT POSITIVE-NOR GATES ORDERING INFORMATION TA PACKAGE† ORDERABLE PART NUMBER TOP-SIDE MARKING QFN − RGY Tape and reel SN74AHCT02RGYR HB02 PDIP − N Tube SN74AHCT02N SN74AHCT02N SOIC − D Tube Tape and reel SN74AHCT02D SN74AHCT02DR AHCT02 −40°C to 85°C SOP |
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ETC |
Plug ±.41 T ±.13 N +.02 -.13 12.01 14.99 19.05 22.23 25.40 28.58 31.75 34.73 38.10 V Thread UNEF Class 2A .4375-28 .5625-24 .6875-24 .8125-20 .9375-20 1.0625-18 1.1875-18 1.3125-18 1.4375-18 Shell Size KK Max 8 10 12 14 16 18 20 22 24 20.62 22.23 25.4 |
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Texas Instruments |
QUADRUPLE 2-INPUT POSITIVE-NOR GATES thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. FUNCTION TABLE (each gate) INPUTS AB OUTPUT Y HX L XH L LL H logic diagram (positive logic) 2 1A 3 1B 5 2A 6 2B 1 1Y 4 2Y 8 3A 9 3B 11 4A 12 4 |
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Texas Instruments |
Single Power Supply 2-Input Positive NOR Gate •1 Single-Supply Voltage Translator at 5.0/3.3/2.5/1.8V VCC • Operating Range of 1.8V to 5.5V • Up Translation – 1.2V(1) to 1.8V at 1.8V VCC – 1.5V(1) to 2.5V at 2.5V VCC – 1.8V(1) to 3.3V at 3.3V VCC – 3.3V to 5.0V at 5.0V VCC • Down Translation – 3 |
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Texas Instruments |
Dual Channel 12-Bit 750Msps Receiver and Feedback 1 • Dual Channel • 12-Bit Resolution • Maximum Clock Rate: 750 Msps • Low Swing Fullscale Input: 1.0 Vpp • Analog Input Buffer with High Impedance Input • Input Bandwidth (3dB): >1.2GHz • Data Output Interface: DDR LVDS • 196-Pin BGA Package (12x12mm |
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ETC |
Plug ±.41 T ±.13 N +.02 -.13 12.01 14.99 19.05 22.23 25.40 28.58 31.75 34.73 38.10 V Thread UNEF Class 2A .4375-28 .5625-24 .6875-24 .8125-20 .9375-20 1.0625-18 1.1875-18 1.3125-18 1.4375-18 Shell Size KK Max 8 10 12 14 16 18 20 22 24 20.62 22.23 25.4 |
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Texas Instruments |
THREE-PHASE BRUSHLESS MOTOR RPM CONTROLLERS ne Surface-Mount Package DA PACKAGE (TOP VIEW) IN2+ IN2 – IN3+ IN3 – FGOUT FGIN – FGIN+ CLT CT RT OSC2 OSC1 VDD FGSOUT GND LD FSEL S/S F/R 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 38 IN1 – 37 IN1+ 36 TEST 35 VPP 34 PHA 33 UGA 32 LGA 31 UGB 30 |
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Texas Instruments |
High-Speed CMOS Logic Quad Two-Input NOR Gate Description • Buffered Inputs • Typical Propagation Delay: CL = 15pF, TA = 25oC 7ns at VCC = 5V, • Fanout (Over Temperature Range) - Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads - Bus Driver Outputs . . . . . . . . . . . |
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Texas Instruments |
QUADRUPLE 2-INPUT POSITIVE-NOR GATE • Operating voltage range of 4.5V to 5.5V • Outputs can drive up to 10 LSTTL loads • Low power consumption, 20-µA max ICC • Typical tpd = 10ns • ±4-mA output drive at 5V • Low input current of 1µA max • Inputs are TTL-Voltage compatible 2 Descriptio |
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Texas Instruments |
QUADRUPLE 2-INPUT POSITIVE-NOR GATE • Operating voltage range of 4.5V to 5.5V • Outputs can drive up to 10 LSTTL loads • Low power consumption, 20-µA max ICC • Typical tpd = 10ns • ±4-mA output drive at 5V • Low input current of 1µA max • Inputs are TTL-Voltage compatible 2 Descriptio |
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Texas Instruments |
QUADRUPLE 2-INPUT POSITIVE-NOR GATES ORDERING INFORMATION TA PACKAGE† ORDERABLE PART NUMBER TOP-SIDE MARKING QFN − RGY Tape and reel SN74AHCT02RGYR HB02 PDIP − N Tube SN74AHCT02N SN74AHCT02N SOIC − D Tube Tape and reel SN74AHCT02D SN74AHCT02DR AHCT02 −40°C to 85°C SOP |
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Texas Instruments |
POSITIVE-NOR GATE 1 • Single-Supply Voltage Translator • Output Level Up to Supply VCC CMOS Level – 1.8 V to 3.3 V (at VCC = 3.3 V) – 2.5 V to 3.3 V (at VCC = 3.3 V) – 1.8 V to 2.5 V (at VCC = 2.5 V) – 3.3 V to 2.5 V (at VCC = 2.5 V • Schmitt-Trigger Inputs Reject Inp |
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Texas Instruments |
High-Speed CMOS Logic Quad Two-Input NOR Gate Description • Buffered Inputs • Typical Propagation Delay: CL = 15pF, TA = 25oC 7ns at VCC = 5V, • Fanout (Over Temperature Range) - Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads - Bus Driver Outputs . . . . . . . . . . . |
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Texas Instruments |
QUADRUPLE 2-INPUT POSITIVE-NOR GATE • Operating voltage range of 4.5V to 5.5V • Outputs can drive up to 10 LSTTL loads • Low power consumption, 20-µA max ICC • Typical tpd = 10ns • ±4-mA output drive at 5V • Low input current of 1µA max • Inputs are TTL-Voltage compatible 2 Descriptio |
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Desde 2024. D4U Semiconductor.
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