No. | parte # | Fabricante | Descripción | Hoja de Datos |
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Texas Instruments |
Embedded V.90 Modem DSP , high-performance modem technology, intended for use in embedded systems and similar applications. This highly integrated solution implements a complete modem using only two chips: the TMS320C54V90 DSP with on-chip RAM and ROM, and the Si3016 line-s |
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ETC |
Stereo FM / TV / MW / SW / LW Digital Tuning Radio .4 1.4.3 ..................................................5 1.5 ....................................................... 5 2 I2C ................................................................................. 6 3 I2C ........................... |
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Texas Instruments |
AUDIO DSP •12 Digital Audio Processor – Fully Programmable With the Graphical, Drag-and-Drop PurePath Studio™ Software Development Environment – 135-MHz Operation – 48-Bit Data Path With 76-Bit Accumulator – Hardware Single-Cycle Multiplier (28 × 48) – Five Si |
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Texas Instruments |
AUDIO DSP 1 • High-Quality Audio Performance: 102-dB Analog-to-Digital Converter (ADC)/105-dB Digital-to-Analog Converter (DAC) (Typical) DNR • Two Differential Stereo Analog Inputs Multiplexed to One Stereo Input ADC • One Differential Stereo Output DAC • Two |
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ETC |
NATURAL SOUND AV AMPLIFIRE |
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ETC |
DOLBY DIGITAL (AC-3) / PRO LOGIC / DTS DECODER + SUB DSP |
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ETCTI |
DSP-SYNC FIRST-IN FIRST-OUT MEMORIES (Rev. E) |
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ETCTI |
Analog Interface For DSP (Rev. D) |
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ETC |
STANDARDSPECIFICATIONS ARKING GUIDE Line 1: ABFF Line 2: 037C Part Number: ABFF037C 3545-B Cadillac Avenue Costa Mesa, CA 92626-1401 (714) 918-4752 Fax (714) 918-4760 |
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ETCTI |
4096 18 DSP-SYNC FIRST-IN FIRST-OUT MEMORY (Rev. A) |
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ETCTI |
TCI6638K2K Multicore DSP+ARM KeyStone II System-on-Chip (SoC) (Rev. D) |
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ETCTI |
Analog Interface For DSP (Rev. D) |
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Texas Instruments |
DSP Controller nnels − Emergency PWM Channel Shutdown With External PDPINTx Pin − Programmable Deadband (Deadtime) Prevents Shoot-Through Faults − Three Capture Units For Time-Stamping of External Events − On-Chip Position Encoder Interface Circuitry − Synchronized |
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Texas Instruments |
DUAL-OUTPUT LOW-INPUT-VOLTAGE DSP POWER SUPPLY CONTROLLER to aide in controlling power sequencing. A tri-level voltage identification definition (VID) sets both regulated voltages to any of 9 preset voltage pairs from 1.3 V to 3.3 V. Other voltages are possible by implementing an external voltage divider. S |
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Texas Instruments |
Dual Output Low-Input-Voltage DSP Power Supply Controller fast transient response time reducing output bulk capacitance (continued). typical design ++ See Note A See Note A + NOTE A: See Table 1 Please be aware that an important notice concerning availability, standard warranty, and use in critical app |
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Texas Instruments |
DSP+ARM Processor 1 • Dual-Core SoC – 200-MHz ARM926EJ-S™ RISC MPU – 200-MHz C674x Fixed- and Floating-Point VLIW DSP • ARM926EJ-S Core – 32- and 16-Bit (Thumb®) Instructions – DSP Instruction Extensions – Single-Cycle MAC – ARM Jazelle® Technology – Embedded ICE-RT™ |
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Texas Instruments |
DSP Codec . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 –1 1.2 Functional Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 –3 1.3 Terminal Assignments . . . . . . |
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Texas Instruments |
Multicore DSP+Arm KeyStone-II System-on-Chip 1Processor cores: • Arm® Cortex®-A15 microprocessor unit (Arm A15) subsystem at up to 1000 MHz – Supports full Implementation of Armv7-A architecture instruction set – Integrated SIMDv2 ( Arm® Neon™ Technology) and VFPv4 (Vector Floating Point) – 32K |
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Texas Instruments |
Fixed- and Floating-Point DSP 1 • 375- and 456-MHz C674x Fixed- and FloatingPoint VLIW DSP • C674x Instruction Set Features – Superset of the C67x+ and C64x+ ISAs – Up to 3648 MIPS and 2746 MFLOPS – Byte-Addressable (8-, 16-, 32-, and 64-Bit Data) – 8-Bit Overflow Protection – Bi |
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Texas Instruments |
DSP Controller . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Flash EEPROM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
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