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ETC |
thyristor |
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Texas Instruments |
SCAN TEST DEVICE -mil Center-to-Center Spacings SN54ABT18502 . . . HV PACKAGE (TOP VIEW) 1A2 1A1 1OEAB GND 1LEAB 1CLKAB TDO VCC NC TMS 1CLKBA 1LEBA 1OEBA GND 1B1 1B2 1B3 1A3 1A4 1A5 GND 1A6 1A7 1A8 1A9 NC VCC 2A1 2A2 2A3 GND 2A4 2A5 2A6 9 8 7 6 5 4 3 2 1 68 67 66 |
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Texas Instruments |
16-BIT BUFFERS/DRIVERS SN54ABT16240A, SN74ABT16240A 16-BIT BUFFERS/DRIVERS WITH 3-STATE OUTPUTS SCBS095G – DECEMBER 1991 – REVISED OCTOBER 1998 SN54ABT16240A . . . WD PACKAGE SN74ABT16240A . . . DGG, DGV, OR DL PACKAGE (TOP VIEW) 1OE 1 1Y1 2 1Y2 3 GND 4 1Y3 5 1Y4 6 VCC 7 |
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Texas Instruments |
16-BIT BUFFERS/DRIVERS tive-low output-enable (OE) inputs. SN54ABT162244 . . . WD PACKAGE SN74ABT162244 . . . DGG, DGV, OR DL PACKAGE (TOP VIEW) 1OE 1 1Y1 2 1Y2 3 GND 4 1Y3 5 1Y4 6 VCC 7 2Y1 8 2Y2 9 GND 10 2Y3 11 2Y4 12 3Y1 13 3Y2 14 GND 15 3Y3 16 3Y4 17 VCC 18 4Y1 19 4Y |
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Texas Instruments |
18-BIT UNIVERSAL BUS TRANSCEIVERS allow data flow in transparent, latched, and clocked modes. Data flow in each direction is controlled by output-enable (OEAB and OEBA), latch-enable (LEAB and LEBA), and clock (CLKAB and CLKBA) inputs. For A-to-B data flow, the device operates in the |
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Texas Instruments |
QUADRUPLE BUS BUFFER GATES independent line drivers with 3-state outputs. Each output is disabled when the associated output-enable (OE) input is low. When VCC is between 0 and 2.1 V, the device is in the high-impedance state during power up or power down. However, to ensure t |
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Texas Instruments |
18-BIT BUS TRANSCEIVERS s two 9-bit transceivers or one 18-bit transceiver. They allow data transmission from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the output-enable (OEAB or OEBA) inputs. SN54ABT16863 . . . WD PACKAGE SN74A |
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Texas Instruments |
16-BIT BUFFERS/DRIVERS SN54ABT16240A, SN74ABT16240A 16-BIT BUFFERS/DRIVERS WITH 3-STATE OUTPUTS SCBS095G – DECEMBER 1991 – REVISED OCTOBER 1998 SN54ABT16240A . . . WD PACKAGE SN74ABT16240A . . . DGG, DGV, OR DL PACKAGE (TOP VIEW) 1OE 1 1Y1 2 1Y2 3 GND 4 1Y3 5 1Y4 6 VCC 7 |
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Texas Instruments |
16-BIT BUS TRANSCEIVER • Controlled Baseline – One Assembly/Test Site, One Fabrication Site • Enhanced Diminishing Manufacturing Sources (DMS) Support • Enhanced Product-Change Notification • Qualification Pedigree (1) • Member of the Texas Instruments Widebus™ Family • St |
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ETC |
BT136 epetitive peak on-state current I2t for fusing Repetitive rate of rise of on-state current after triggering full sine wave; Tmb ≤ 107 ˚C full sine wave; Tj = 25 ˚C prior to surge t = 20 ms t = 16.7 ms t = 10 ms ITM = 6 A; IG = 0.2 A; dIG/dt = 0.2 A/µ |
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Texas Instruments |
20-BIT BUS-INTERFACE D-TYPE LATCHES noninverting 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. They are particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers. The ’AB |
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Texas Instruments |
16-BIT BUFFERS/DRIVERS itters. SN54ABT16241A, SN74ABT16241A 16-BIT BUFFERS/DRIVERS WITH 3-STATE OUTPUTS SCBS096G – FEBRUARY 1991 – REVISED OCTOBER 1998 SN54ABT16241A . . . WD PACKAGE SN74ABT16241A . . . DGG, DGV, OR DL PACKAGE (TOP VIEW) 1OE 1 1Y1 2 1Y2 3 GND 4 1Y3 5 1Y4 |
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ETC |
DC/DC Converters • Fully Regulated Outputs • Industry Standard Pinouts • Input/Output Isolation • 5, 12, 24 and 48 VDC Inputs • PCB Mountable • Low Cost MODELS CHART MODEL NUMBER BT101 BT102 BT103 BT104 BT105 BT201 BT202 BT203 BT204 BT205 BT301 BT302 BT303 BT304 BT3 |
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Texas Instruments |
SCAN TEST DEVICE 1149.1-1990 boundary scan to facilitate testing of complex circuit-board assemblies. Scan access to the test circuitry is accomplished via the 4-wire test access port (TAP) interface. SN54ABT18245 . . . WD PACKAGE (TOP VIEW) 1DIR 1B1 1B2 GND 1B3 1 |
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Texas Instruments |
18-BIT FET BUS-EXCHANGE SWITCHES 35 5B2 34 GND 33 6B1 32 6B2 31 7B1 30 7B2 29 GND 28 8B1 27 8B2 26 9B1 25 9B2 ORDERING INFORMATION TA PACKAGE† ORDERABLE PART NUMBER TOP-SIDE MARKING −40°C to 85°C SSOP − DL TSSOP − DGG Tube Tape and reel Tape and reel SN74CBT16209ADL SN74CB |
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Texas Instruments |
20-BIT BUS-INTERFACE D-TYPE LATCHES 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. They are particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers. SN54ABT16841 . . . |
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Texas Instruments |
16-BIT TRANSPARENT D-TYPE LATCHES • Controlled Baseline – One Assembly/Test Site, One Fabrication Site • Extended Temperature Performance of –55°C to 125°C • Enhanced Diminishing Manufacturing Sources (DMS) Support • Enhanced Product Change Notification • Qualification Pedigree (1) • |
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Texas Instruments |
18-BIT BUS-INTERFACE FLIP-FLOPS 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. They are particularly suitable for implementing wider buffer registers, I/O ports, bidirectional bus drivers with parity, and working registers. Th |
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Texas Instruments |
20-BIT BUFFERS/DRIVERS ce state. The outputs, which are designed to source or sink up to 12 mA, include equivalent 25-Ω series resistors to reduce overshoot and undershoot. SN54ABT162827A, SN74ABT162827A 20ĆBIT BUFFERS/DRIVERS WITH 3ĆSTATE OUTPUTS SCBS248F − JULY 1993 − R |
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Texas Instruments |
16-BIT BUFFERS/DRIVERS • Members of the Texas Instruments Widebus™ Family • State-of-the-Art EPIC-IIB™ BiCMOS Design Significantly Reduces Power Dissipation • Latch-Up Performance Exceeds 500 mA Per JESD 70 • Typical VOLP (Output Ground Bounce) <1 V at VCC = 5 V, TA = 25°C |
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Desde 2024. D4U Semiconductor.
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