No. | parte # | Fabricante | Descripción | Hoja de Datos |
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Texas Instruments |
100-MSPS High-SNR ADC •1 Maximum Sample Rate: 100 MSPS • Programmable Device Resolution – Quad-Channel, 16-Bit, High-SNR Mode – Quad-Channel, 14-Bit, Low-Power Mode • 16-Bit High-SNR Mode – 1.4 W Total Power at 100 MSPS – 355 mW / Channel – 4 Vpp Full-scale Input – 85-dBF |
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Texas Instruments |
16-Bit Analog Front-End 1 •23 Eight Low-Noise PGAs and Eight High-Resolution ADCs (ADS1198) • Low Power: 0.55mW/channel • Input-Referred Noise: 12μVPP (150Hz BW, G = 6) • Input Bias Current: 200pA • Data Rate: 125SPS to 8kSPS • CMRR: –105dB • Programmable Gain: 1, 2, 3, 4, |
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ETC |
14-Bit/ 500kHz/ Low-Power Sampling A/D Converters • • • • • • • • • 14-bit resolution 500kHz sampling rate Functionally complete; No missing codes Small 24-pin DDIP or SMT package Operates from ±15V or ±12V supplies Low power, 1.75 Watts maximum Samples up to Nyquist frequencies Outstanding dynamic |
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Texas Instruments |
Quad Channel 14-Bit 500 MSPS ADC •1 4 Channel, 14-Bit 500 MSPS ADC • Analog input buffer with high impedance input • Flexible input clock buffer with divide by 1/2/4 • 1.25 VPP Differential full-scale input • JESD204B Serial interface – Subclass 1 compliant up to 5 Gbps – 1 Lane Per |
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ETC |
Multilayer Chip Beads |
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Texas Instruments |
Autonomous Audio Headset Switch 1 • Ground FET Switches (60mΩ typical) • Autonomous Detection of Headset Types: 3-Poles or 4-Poles (with MIC on SLEEVE or RING2) • Microphone Line Switches • Supports FM Signal Transmission Through the Ground FETs • Reduction of Click/Pop Noise • VDD |
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Texas Instruments |
12-Bit ADC •1 Small package size: – 3-mm × 3-mm WQFN • 8 channels configurable as any combination of: – Up to 8 analog inputs, digital inputs, or digital outputs • GPIOs for I/O expansion: – Open-drain, push-pull digital outputs • Analog watchdog: – Programmabl |
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Texas Instruments |
Analog-to-Digital Converters 1 •2 Output Interface: – Single-Lane and Dual-Lane Interfaces – Maximum Data Rate: 3.125 Gbps – Meets JEDEC JESD204A Specification – CML Outputs with Current Programmable from 2 mA to 32 mA • Power Dissipation: – 583 mW at 160 MSPS in Dual-Lane Mode |
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Texas Instruments |
Ultralow-Power ADC 1 •23 Maximum Sample Rate: 250MSPS • Ultralow Power with 1.8V Single Supply: – 201mW Total Power at 160MSPS – 265mW Total Power at 250MSPS • High Dynamic Performance: – SNR: 70.6dBFS at 170MHz – SFDR: 84dBc at 170MHz • Dynamic Power Scaling with Samp |
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Texas Instruments |
Delta-Sigma ADC •1 Current Consumption as Low as 315 µA (typ) • Wide Supply Range: 2.3 V to 5.5 V • Programmable Gain: 1 to 128 • Programmable Data Rates: Up to 2 kSPS • Up to 20 Bits Effective Resolution • Simultaneous 50-Hz and 60-Hz Rejection at 20 SPS With Singl |
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Texas Instruments |
16-Bit ADC •1 Ultra-Small X2QFN Package: 2 mm × 1.5 mm × 0.4 mm • Wide Supply Range: 2.0 V to 5.5 V • Low Current Consumption: 150 μA (Continuous-Conversion Mode) • Programmable Data Rate: 8 SPS to 860 SPS • Single-Cycle Settling • Internal Low-Drift Voltage Re |
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Texas Instruments |
Analog-to-Digital Converters •1 16-Bit Resolution • Maximum Sample Rate: – ADS5562: 80 MSPS – ADS5560: 40 MSPS • Total Power: – 865 mW at 80 MSPS – 674 mW at 40 MSPS • No Missing Codes • High SNR: 84 dBFS (3 MHz IF) • SFDR: 85 dBc (3 MHz IF) • Low-Frequency Noise Suppression Mod |
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Texas Instruments |
Analog-to-Digital Converters • 14-bit resolution, dual-channel, 1-GSPS ADC • Noise floor: –158 dBFS/Hz • Spectral performance (fIN = 170 MHz at –1 dBFS): – SNR: 69.0 dBFS – NSD: –155.9 dBFS/Hz – SFDR: 86 dBc (Including Interleaving Tones) – SFDR: 89 dBc (Except HD2, HD3, and int |
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Texas Instruments |
Analog-to-Digital Converters • Quad channel • 14-Bit resolution • Maximum clock rate: 500 MSPS • Input bandwidth (3 dB): 900 MHz • On-chip dither • Analog Input buffer with high-impedance input • Output options: – Rx: decimate-by-2 and -4 options with Low-Pass lFilter – 200-MHz |
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Texas Instruments |
Single 12-Bit 800-Msps Analog-to-Digital Converter •1 Single-Channel • 12-Bit Resolution • Maximum Clock Rate: 800 Msps • Low Swing Fullscale Input: 1.0 Vpp • Analog Input Buffer With High Impedance Input • Input Bandwidth (3 dB): > 1.2 GHz • Data Output Interface: DDR LVDS • Optional 2x Decimation W |
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ETC |
Multilayer Chip Beads |
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ETC |
(MLB-Series) Ferrite Chip Beads e e h have a monolithic inorganic material construction that minimizes the effect of A-Series chip beads S electromagnetic interference. a Characteristics t • Wide Frequency a D A-series . chip beads can generate impedances over a wide range of freq |
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ETC |
Multilayer Chip Beads |
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ETC |
Chip Beads |
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Texas Instruments |
Ultralow-Power ADC •1 Ultralow Power with Single 1.8V Supply, CMOS Output: – 277mW total power at 125MSPS • High Dynamic Performance: – 88dBc SFDR at 170MHz – 71.4dBFS SNR at 170MHz • Crosstalk: > 90dB at 185MHz • Programmable Gain up to 6dB for SNR/SFDR Trade-off • DC |
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