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ETC |
Power MOSFET 110A, 55V, RDS(on) = 8.0mΩ fast switching speed Available RoHS* ? COMPLIANT Limit value (TC=25℃) parameter name Drain-source voltage Drain current @Tc=25℃ Gate-source voltage Dissipated power @Tc=25℃ Junction temperature Storage temperature aval |
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Texas Instruments |
Low-Power Stereo Audio Codec • Stereo audio DAC: – 102-dBA signal-to-noise ratio – 16-, 20-, 24-, or 32-bit data – Supports sample rates from 8 kHz to 96 kHz – 3D, bass, treble, EQ, or de-emphasis effects – Flexible power saving modes and performance are available • Stereo audio |
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Texas Instruments |
Ultra Low Power Stereo Audio Codec •1 Stereo Audio DAC with 100-dB SNR • 5.8-mW Stereo 48-ksps DAC-to-Ground-Centered Headphone Playback • Stereo Audio ADC with 93-dB SNR • 5.2-mW Stereo 48-ksps ADC Record • PowerTune™ • Extensive Signal Processing Options • Six Single-Ended or 3 Full |
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Texas Instruments |
Multicore Fixed and Floating-Point Digital Signal Processor and Description 1.1 Features • Four TMS320C66x™ DSP Core Subsystems (C66x CorePacs), Each with – 1.0 GHz or 1.25 GHz C66x Fixed/Floating-Point CPU Core › 40 GMAC/Core for Fixed Point @ 1.25 GHz › 20 GFLOP/Core for Floating Point @ 1.25 GHz – Memory |
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ETC |
SY320/2 Silicon rectifier diode |
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ETC |
SY320/7 Silicon rectifier diode |
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Texas Instruments |
Differential Analog Buffer Amplifier 70°C TL32088CNS TL32088 can convert input signals from single-ended to differential and differential to single-ended. The TL32088 also implements a single-ended to single-ended and differential to differential amplifier buffer. The differential |
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Texas Instruments |
Microcontrollers • High-efficiency 32-bit CPU (TMS320C28x) – 60MHz (16.67ns cycle time) – 16 × 16 and 32 × 32 MAC operations – 16 × 16 dual MAC – Harvard bus architecture – Atomic operations – Fast interrupt response and processing – Unified memory programming model |
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ETC |
Display |
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Texas Instruments |
Digital Signal Processor Features D High-Performance Static CMOS Technology D Three 32-Bit CPU-Timers − 150 MHz (6.67-ns Cycle Time) − Low-Power (1.8-V Core at 135 MHz, 1.9-V Core at 150 MHz, 3.3-V I/O) Design − 3.3-V Flash Voltage D JTAG Boundary Scan Support† D High-Pe |
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Texas Instruments |
Dual-Channel CODEC • Stereo 16-Bit Oversampling Sigma-Delta A/D Converter • Stereo 16-Bit Oversampling Sigma-Delta D/A Converter • Support Maximum Master Clock of 100 MHz to Allow DSPs Output Clock to be Used as a Master Clock • Selectable FIR/IIR Filter With Bypassing |
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Texas Instruments |
Fixed-Point Digital Signal Processor 12 • High-Performance, Low-Power, TMS320C55x™ Fixed-Point Digital Signal Processor – 16.67-, 13.33-, 10-, 8.33-, 6.66-ns Instruction Cycle Time – 60-, 75-, 100-, 120-, 150-MHz Clock Rate – One/Two Instructions Executed per Cycle – Dual Multipliers [U |
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ETC |
Controller Application HC320 is generally used for the supervision of mA signals. The signal may be delivered by a standard sensor with 4-20 mA output or from one of our HCxxx transmitters. The HCxxx familiy consists of transmitters for pH, O2, conductivity an |
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Texas Instruments |
Digital Signal Processor ) Technology by Texas Instruments SGUS027C − APRIL 1998 − REVISED OCTOBER 2001 D 144-Pin Plastic Quad Flatpack ( PCM Suffix ) 5 V D Eight Extended-Precision Registers D Two Address Generators With Eight Auxiliary Registers and Two Auxiliary Registe |
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Texas Instruments |
Microcontrollers • High-efficiency 32-bit CPU (TMS320C28x) – 60MHz (16.67ns cycle time) – 16 × 16 and 32 × 32 MAC operations – 16 × 16 dual MAC – Harvard bus architecture – Atomic operations – Fast interrupt response and processing – Unified memory programming model |
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Texas Instruments |
Low Power Stereo Audio Codec • Stereo Audio DAC – 100-dBA Signal-to-Noise Ratio – 16/20/24/32-Bit Data – Supports Rates From 8 to 192 kHz – Programmable DAC Filter Engine • Stereo Audio ADC – 92-dBA Signal-to-Noise Ratio – Supports Rates from 8 to 192 kHz – Programmable ADC Filt |
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Texas Instruments |
Embedded V.90 Modem DSP , high-performance modem technology, intended for use in embedded systems and similar applications. This highly integrated solution implements a complete modem using only two chips: the TMS320C54V90 DSP with on-chip RAM and ROM, and the Si3016 line-s |
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Texas Instruments |
Family Precision 0-Delay Clock Conditioner 12 • Integrated VCO with Very Low Phase Noise Floor • Integrated Integer-N PLL with Outstanding Normalized Phase Noise Contribution of -224 dBc/Hz • VCO Divider Values of 2 to 8 (All Divides) – Bypassable with VCO Mux When Not in 0delay Mode • Channe |
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Texas Instruments |
Real-Time Microcontrollers • High-efficiency 32-bit CPU (TMS320C28x) – 60MHz (16.67ns cycle time) – 16 × 16 and 32 × 32 MAC operations – 16 × 16 dual MAC – Harvard bus architecture – Atomic operations – Fast interrupt response and processing – Unified memory programming model |
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Texas Instruments |
Low Power Stereo Audio Codec •1 105dB SNR for Stereo Audio DAC to Differential Lineout • 95dB SNR for Stereo Line Input to Audio ADC • 8-192kHz Playback and Record • 24 mW output power from DirectPathTM Headphone Driver • 121 mW output power from Differential Receiver Output Dri |
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Desde 2024. D4U Semiconductor.
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